Problem with hdmi_in example project on zybo board

[DamBalzani]

hi everyone,

i download the example hdmi_in and i'm tryong to open it with vivado but while i'm running the tcl script occurs this error:

ERROR: [BD 5-216] VLNV <digilentinc.com:ip:axi_dynclk:1.0> is not supported for the current part. 
ERROR: [Common 17-39] 'create_bd_cell' failed due to earlier errors.

    while executing
"create_bd_cell -type ip -vlnv digilentinc.com:ip:axi_dynclk:1.0 axi_dynclk_0 "
    (procedure "create_root_design" line 50)
    invoked from within
"create_root_design """
    (file "../src/bd/system.tcl" line 1669)

    while executing
"source $origin_dir/src/bd/system.tcl"
    (file "C:/Users/Damiano Balzani/Documents/zybo/Progetti/2015.4/hdmi_in/proj/create_project.tcl" line 102)

 

can you help me?

[D@n]

@DamBalzani,

Hmm ... I'm guessing you are having a problem with Vivado versions.  What version are you using?

Dan

[DamBalzani]

2016.2 and 2015.4

[jpeyron]

Hi @DamBalzani,

The zybo hdmi-in github project here is made with Vivado 2016.2 so make sure that you are using this specific project. This github zybo hdmi-in project is made for Vivado 2016.4.

cheers,

Jon

[Venkatesh Raju]

Hello Sir, 

I am new to zybo board. 

I am using vivado 2016.4. i have downloaded the HDMI IN project for Vivado 2016.4 version.

When i run the script "create_project.tcl" i got these error.

1)

ERROR: [BD 41-1665] Unable to generate top-level wrapper HDL for the BD-design 'hdmi_in.bd' is locked. Locked reason(s):
* BD design contains locked IPs. Please run report_ip_status for more details and recommendations on how to fix this issue. 
List of locked IPs: 
hdmi_in_axi_dynclk_0_0
hdmi_in_dvi2rgb_0_0
hdmi_in_rgb2vga_0_0

ERROR: [Common 17-39] 'make_wrapper' failed due to earlier errors.

    while executing
"make_wrapper -files [get_files $design_name.bd] -top -force"
    invoked from within
"if {[llength $bd_list] != 0} {
  add_files -norecurse -quiet -fileset sources_1 [glob -nocomplain $src_dir/bd/*/*.bd]
  open_bd_design [glob -nocompla..."
    (file "./create_project.tcl" line 125)

2) 

CRITICAL WARNING: [BD 41-51] Could not find bus definition for the interface: TMDS 
CRITICAL WARNING: [BD 41-49] Could not find abstraction definition for the interface: TMDS 
CRITICAL WARNING: [BD 41-49] Could not find abstraction definition for the interface: TMDS 

Please help me how to rectify these errors . 

Thanks in advance

[jpeyron]

Hi @Venkatesh Raju,

You also need to download the vivado_library in the repo section of the github here and insert the contents on the vivado library in the repo folder in the downloaded folder. 

thank you,

Jon

[hongquan18196]

hi @jpeyron

I am using vivado 2016.2 and I ran HDMI_In form github that you mention above. I have the Error:

ERROR: [IP_Flow 19-3461] Value 'btns_4bits' is out of the range for parameter 'GPIO BOARD INTERFACE(GPIO_BOARD_INTERFACE)' for BD Cell 'axi_gpio_btn' . Valid values are - Custom
INFO: [IP_Flow 19-3438] Customization errors found on 'axi_gpio_btn'. Restoring to previous valid configuration.
INFO: [Common 17-17] undo 'set_property'
ERROR: [Common 17-39] 'set_property' failed due to earlier errors.

    while executing
"rdi::add_properties -dict {CONFIG.GPIO_BOARD_INTERFACE btns_4bits CONFIG.USE_BOARD_FLOW true} /axi_gpio_btn"
    invoked from within
"set_property -dict [ list  CONFIG.GPIO_BOARD_INTERFACE {btns_4bits}  CONFIG.USE_BOARD_FLOW {true}  ] $axi_gpio_btn"
    (procedure "create_root_design" line 54)
    invoked from within
"create_root_design """
    (file "../src/bd/system.tcl" line 1669)
update_compile_order -fileset sources_1

Could you help me fix it please? 

Thank you,

Quan Nguyen

[jpeyron]

Hi @hongquan18196,

I just finished generating a bitstream without issue using the hdmi_in project linked above using Vivado 2016.2. I woulds start by unzipping a fresh project. To run the project linked above copy the path to where the unzipped project proj folder is. Then in the tcl console in vivado 2016.2 enter cd  and the path to the proj folder and then select proj and hit enter. On my pc the path is:  C:\Users\jpeyron\Desktop\ZYBO-master\Projects\hdmi_in\proj. Then enter source ./ and select create_project.tcl. Once the project has loaded generate a bitstream.  If you are still experiencing issues let us know. please include a screen shot of Vivado's  block design along with any errors. Also include the wrapper and xdc files.

thank you,

Jon 

[hongquan18196]

Hi jpeyron,

Thank you for your comment. I ran the demo project sucessfully. 

Regards,

Quan Nguyen

[jpeyron]

Hi @hongquan18196,

Glad to hear you were able to get the demo working.

thank you,

Jon