Arty-S7?

[asmi]

It's been spoiled by Xilinx in their recent video. Any info on when & what (beyond the fact that it uses XC7S50 device)? Thanks!

[jpeyron]

Hi @asmi, 

We are super exited about the Arty-S7 and going full throttle with this project! (no eta yet)

cheers,

Jon

[asmi]

What about the "contents" of the board (meaning port/peripherals and stuff)? I expect it to be somewhat similar to Arty (which I have and love!), but wonder if you can provide any details on that. Thanks!

[JColvin]

Hi @asmi,

I talked with my supervisor and learned that the Arty S7 is still in development at this point, so we don't know what ports and peripherals will be available on the board as of yet. 

Hopefully we all get to learn what it has soon!

Thanks,
JColvin

[JColvin]

Oh, and for others reading this thread, here is the video that asmi is referring to: https://www.youtube.com/watch?v=nzQYLflFfmo

[asmi]

OK, thanks!

[sbobrowicz]

Only additional info I can provide today is that the peripheral set will basically be a slightly scaled back set of what is included with the Arty.

FYI, If you keep an eye on our wiki and github, you can usually spot new info about upcoming boards before we officially announce them. This is because we develop most of our documentation and materials on these public tools/servers.

 

[asmi]

5 hours ago, sbobrowicz said:

is that the peripheral set will basically be a slightly scaled back set of what is included with the Arty.

I've watched the video again and noticed lack of Ethernet port. Which is what I suspected would be axed to save cost. I understand that this is not a final version, but that's OK with me.

5 hours ago, sbobrowicz said:

FYI, If you keep an eye on our wiki and github, you can usually spot new info about upcoming boards before we officially announce them. This is because we develop most of our documentation and materials on these public tools/servers.

I actually use your docs a lot! I like designing and building my own boards (because I prefer my designs to be as compact and low power as possible, also it's unrealistic to expect to find a board on the market that contains just the mix of peripherals for any particular project I have in mind), but I always look at your schematics and general layout to aid my own schematics & design, because as good as Xilinx documentation is, it is clearly written for experienced designers, and they often make assumptions that certain things are known to them and thus don't go into too much of details. But looking at how others are doing things is a great way to learn!

[ncs]

Digikey has the XC7S6 available!!! But $18+ for 6K logic cells seems pretty high given that similar capacity MAX10 and IGLOO2 cost much less. Of course IGLOO2 cannot do soft-core but MAX10 can, so a bit dissatisfied on the cost side. Will be interesting to see where the Cyclone 10 be placed at.

[D@n]

@ncs,

IGLOO2 cannot do a soft core?  Why on earth not?

Dan

[asmi]

33 minutes ago, ncs said:

Digikey has the XC7S6 available!!! But $18+ for 6K logic cells seems pretty high given that similar capacity MAX10 and IGLOO2 cost much less. Of course IGLOO2 cannot do soft-core but MAX10 can, so a bit dissatisfied on the cost side. Will be interesting to see where the Cyclone 10 be placed at.

I kinda half-expected such prices as otherwise they'd undercut their own S6 devices which are still in production and they aren't going away any time soon. Would be more interesting to see 25 and 50 models and how they compare to corresponding Artix devices.

Besides, keep in mind that $18 is for 120+ devices, which is not something a hobbyist would ever need. For that I'd rather use Lattice iCE40 Ultra/UltraPlus FPGAs which are much cheaper and are available in hobbyist-friendly QFN-48 package. So I'm mostly interested in mid-spec models as even very modest MicroBlaze + UARTlite + DDR3 MIG system consumes about 8k logic cells. So anything less that 15k is just not worth bothering with IMHO - especially for that price.

[loberman]

Now that the arty-S7 is out, yep no Ethernet

I have Linux running on it manual build, not using Petalinux

Steps

--------

Use the base design from the Digilent github

Create and build the fsbl project (tar file attached)

Ensure bitstream has the elf file associated

Use the SDK to also create the DTS files and merge them

copy the final to kernel_src_dir/arch/microblaze/boot/dts/artylinux.dts

Build the kernel

#cat build_it.sh
 export CROSS_COMPILE=microblazeel-xilinx-linux-gnu-
 make ARCH=microblaze clean
 make ARCH=microblaze simpleImage.artylinux -j8

cp arch/microblaze/boot/simpleImage.artylinux .
cp simpleImage.artylinux ..

cd ..    #(root of project)

mb-objcopy -O binary simpleImage.artylinux artylinux.bin

Use this example tcl to create the mcs file

set_property BITSTREAM.Config.SPI_BUSWIDTH 4 [current_design]
write_bitstream /data/Xilinx/Arty-S7-50-base/download.bit -force
write_cfgmem  -format mcs -size 16 -interface SPIx4 -loadbit {up 0x00000000 "/data/Xilinx/Arty-S7-50-base/download.bit" } -loaddata {up 0x00500000 "/data/Xilinx/Arty-S7-50-base/artylinux.bin" } -force -file "/data/Xilinx/Arty-S7-50-base/lemicro.mcs"

Reset and Linux will boot

fsbl.tar.xz