I am compiling a simple tutorial example for the Basys2 on the Xilinx project navigator and I get the following error message regarding my ucf file. I used the same ucf file for other programs and it worked.
WARNING:ConstraintSystem - A target design object for the Locate constraint
'<NET "ld<7>" LOC = "G1" ;> [gates2.ucf(1)]' could not be found and so the
Locate constraint will be removed.
WARNING:ConstraintSystem - A target design object for the Locate constraint
'<NET "ld<6>" LOC = "P4" ;> [gates2.ucf(2)]' could not be found and so the
Locate constraint will be removed.
-------
etc.
the code is below
any assistance would be appreciated.
-- Example 1b: 2-input gates
-- Copyright 2009, 2012 LBE Books, LLC
library IEEE;
use IEEE.STD_LOGIC_1164.all;
entity gates2_top is
port(
sw : in STD_LOGIC_VECTOR(1 downto 0);
ld : out STD_LOGIC_VECTOR(5 downto 0)
);
end gates2_top;
architecture gates2_top of gates2_top is
component gates2 is
port(
a : in STD_LOGIC;
b : in STD_LOGIC;
z : out STD_LOGIC_VECTOR(5 downto 0)
);
end component;
begin
c1 : gates2
port map(
a => sw(1),
b => sw(0),
z => ld
);
end gates2_top;
-- Example 1: 2-input gates
-- Copyright 2009, 2012 LBE Books, LLC
library IEEE;
use IEEE.STD_LOGIC_1164.all;
entity gates2 is
port(
a : in STD_LOGIC;
b : in STD_LOGIC;
z : out STD_LOGIC_VECTOR(5 downto 0)
);
end gates2;
architecture gates2 of gates2 is
begin
z(5) <= a and b;
z(4) <= a nand b;
z(3) <= a or b;
z(2) <= a nor b;
z(1) <= a xor b;
z(0) <= a xnor b;
end gates2;
-- ucf file
NET "ld<7>" LOC = "G1" ; # Bank = 3, Signal name = LD7
NET "ld<6>" LOC = "P4" ; # Bank = 2, Signal name = LD6
NET "ld<5>" LOC = "N4" ; # Bank = 2, Signal name = LD5
NET "ld<4>" LOC = "N5" ; # Bank = 2, Signal name = LD4
NET "ld<3>" LOC = "P6" ; # Bank = 2, Signal name = LD3
NET "ld<2>" LOC = "P7" ; # Bank = 3, Signal name = LD2
NET "ld<1>" LOC = "M11" ; # Bank = 2, Signal name = LD1
NET "ld<0>" LOC = "M5" ; # Bank = 2, Signal name = LD0
NET "sw<7>" LOC = "N3";
NET "sw<6>" LOC = "E2";
NET "sw<5>" LOC = "F3";
NET "sw<4>" LOC = "G3";
NET "sw<3>" LOC = "B4";
NET "sw<2>" LOC = "K3";
NET "sw<1>" LOC = "L3";
NET "sw<0>" LOC = "P11";
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I am compiling a simple tutorial example for the Basys2 on the Xilinx project navigator and I get the following error message regarding my ucf file. I used the same ucf file for other programs and it worked.
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