I would like to interface fpga with adc. From the data sheet of ADC I came to know the conversion time is 14 sclk and the adc gives each bit in the falling edge. I have written verilog code for the rising edge count but, not getting correct output. Plz help me.
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Ananthan
Hi,
I would like to interface fpga with adc. From the data sheet of ADC I came to know the conversion time is 14 sclk and the adc gives each bit in the falling edge. I have written verilog code for the rising edge count but, not getting correct output. Plz help me.
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