fpga Arty - Differential signaling: problem with P and N outputs

[georgian.andrei]

Hello!

I'm currently working on a project  and i need to use differential signaling.

I'm using Arty development platform (designed around the Artix-7™ FPGA) and I have some problems in generating the two differential signals (P and N). I used an oscilloscope to check the signal that I want to be sent (MDO) by configuring it as a single ended signal and it is correct. But when I use OBUFDS the two differential signals are logic low all time. I put the verilog code below and the .xdc file configuration.

Thank you very much! Have a good day!

OBUFDS #(
    .IOSTANDARD("TMDS_33"), // Specify the output I/O standard
    .SLEW("FAST")             // Specify the output slew rate
) OBUFDS_inst (
    .O(ME_DIFF_P),             // Diff_p output 
    .OB(ME_DIFF_N),         // Diff_n output
    .I(MDO)                         // Buffer input
);

# .xdc file
set_property PACKAGE_PIN U12 [get_ports ME_DIFF_P]
set_property PACKAGE_PIN V12 [get_ports ME_DIFF_N]
set_property IOSTANDARD TMDS_33 [get_ports ME_DIFF_P]
set_property IOSTANDARD TMDS_33 [get_ports ME_DIFF_N]

set_property CONFIG_VOLTAGE 3.3 [current_design]
set_property CFGBVS VCCO [current_design]
set_switching_activity -deassert_resets 

 

[D@n]

@georgian.andrei,

Based upon your post above, nothing is jumping out at me.  It all looks right.

There's a couple places I might look for an error, though, were I you: 1) Are you actually configuring the ARTY with this configuration?  2) Were there any errors along the way, things like ... the XDC file not being found, pins not being defined, etc.?  3) Are you checking the right pins coming out of the Arty?  U12 and V12 should be side-by-side (not top and bottom) on the top side of the pmod port marked JC.

Just some thoughts,

Dan

[georgian.andrei]

9 minutes ago, D@n said:

@georgian.andrei,

Based upon your post above, nothing is jumping out at me.  It all looks right.

There's a couple places I might look for an error, though, were I you: 1) Are you actually configuring the ARTY with this configuration?  2) Were there any errors along the way, things like ... the XDC file not being found, pins not being defined, etc.?  3) Are you checking the right pins coming out of the Arty?  U12 and V12 should be side-by-side (not top and bottom) on the top side of the pmod port marked JC.

Just some thoughts,

Dan

1-2) I made a lot of test (using others signals) and I'm configuring the ARTY with that configuration. There are not any errors related to the XDC file.

3-4) I'm using the first and the second pins from pmod port JC and they are side-by-side. 

I'm making test for about two days and those two signals are the only one that are causing me problems.

Thank you,

Andrei

[jpeyron]

Hi @georgian.andrei,

I am not seeing anything directly wrong with your code. I found threads Here , Here and here about the TMDS_33 IOSTANDARD. I also found a thread here that uses  IOSTANDARD LVCMOS33 have you tried IOSTANDARD LVCMOS33?

cheers,

Jon

[D@n]

@jpeyron,

But ... LVCMOD33 isn't a differential standard!    Are you suggesting trying to send differential signals via a non-differential standard?  (Not impossible, but ... let's just be clear ... )

Dan

[georgian.andrei]

What I'v done to solve the problem is detailed in the link below. Thanks jpeyron !