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PmodBT2 diffrent board value


BogdanD

Question

Greetings,

I am working on a project that involves transferring data over Bluetooth using the PmodBT2 on a Zybo board. I have downloaded the IP for the pmod and right-clicked the JA connector on the 'Board' tab in Vivado, thus adding the PmodBT2 on the block design. However, synthesis yields the following error(s):

[IP_Flow 19-4965] IP PmodBT2_axi_uart16550_0_0 was packaged with board value 'digilentinc.com:nexys4_ddr:part0:1.1'. Current project's board value is 'digilentinc.com:zybo:part0:1.0'. Please update the project settings to match the packaged IP.

I suspect that communicating via bluetooth is achieved the same way as UART communication over cable, but by selecting the corespondent COM for bluetooth.

Am I missing something in creating the block design? What recommendations do you have in order to correct the issue?

Thanks you.

I added screenshots of the block design and the synthesis errors.

bluetoothBD.png

errors.png

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4 answers to this question

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Hi BogdanD,

The first set of warnings is letting you know that the IP was made using a different board than the one you are using. This warnig only appears in Vivado 2016.4 and will not cause an issue with your design.  I believe the second warnings has to do with the ZYNQ processor. On the default setting it sets up the XADC which is on JA. First solution is to use JB instead and see if this fixes the issue. Second solution is to click into the ZYNQ processor and disable the XADC hopefully freeing up those pins.

cheers,

Jon  

 

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Hey Jon,

 

Thank you for being helpful. I will ignore the first set of warnings, but I don't think I should do the same for the second ones. I moved the Pmod from JA to JB and all the way to JE, but, nevertheless, the result is the same. Strangely, I tested the design by adding an OLED Pmod and a PmodWIFI to the connectors, I did not receive the port assigning warnings in this case. By using BlueTerm on an Android phone to print a message, I've been able to connect the device but not been able to see the output on the terminal. I believe that the pin assignment warnings are the cause. Do you have any other recommendation? I've added print screens of the ports used by Zynq processor (XADC is not used) and the Bluetooth Pmod constraints pin usage.

Thank you,

Bogdan

 

BT_pins.png

zynq_usage.png

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Hi BogdanD,

I just downloaded the vivado-library from github and was able to generate a bitstream using the Zybo/ZYNQ and PmodBT2 without an issue using Vivado 2016.4. I have included my project below.  I would suggest to either re-download the vivado-library from our github here or use the folder that i attached below and replace the folder you have on your computer. Then re-start your project let me know if you still get these pin conflicts? Also are you able to run my project?

cheers,

Jon

zybo_stuff.zip

vivado-library-master.zip

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Hey Jon,

Are you sure that you did not get the pin/port warnings? I am able to generate the bitstream file, but still with warnings. Those are the messages that I get from the project that you attached earlier (as you can see, the path shown is from your Desktop), without running synthesis or changing anything, apart from the library files that I replaced. Maybe the bluetooth module works with those warnings, I will test that tomorrow.

Thanks,

Bogdan

jon_warnings.png

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