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GreatGBL

A strange question of Zedboard PS part catch GPIO value

Question

 

Hello, I want to use Zedboard to catch the data from GPIO and save it into DDR3 memory. While the problem is that the DDR3 memory at the PS( Programmable  System)part and GPIO at PL(Programmable Logic) part.  The Zedboard has two processor, one for manage the ARM and another one manage the FPGA. So I use the  AXI protocol IP to communicate them between PS and PL part. The whole designed system shows below.

 

QQ图片20170219230617.png

 

It is successfully, but I want to do some process on GPIO data, because my project can't use the GPIO data directly, it needs to be collected at certain conditions.

For makes my question easier,  I set one GPIO disconnect to the "design_1" module, using permanently value '1010' to inside it.

 

1.jpg

2.png

 

Here is my whole system block diagram, the GPIO data “gpio_2_tri_i[3:0]" is disconnect with "U1” module, it replace by '1010'

3.jpg

 

 

In the PS(ARM) part, I write the C code to catch 3 GPIO value, note that only the data "gpio_2_tri_i[3:0]" is replaced.

5.png

 

However, the strange problem is shown below, The console shows that the "gpio_2_tri_i[3:0]"  is F ,  not the "1010".

I am strong believe that it has been disconnected and replaced by '1010', but why the PS part (ARM) can also catch the data directly from GPIO?

6.png

My question can be described below, so how could I add my data processor into the system? If I want to do the Inverted process at data, how could I do? It looks like the PS(ARM) can directly read the value from GPIO, not follow the block diagram.

PARINT.png

 

 

 

 

For make my question short, just how could I add my own block design (like a not game) at there shown at the diagram below. thanks for your help,

 

QUSTION.png

 

Best Regards,

GreatGBL

 

QUSTION.png

Edited by GreatGBL

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Hi GreatGBL,

I would suggest to add your changes before the AXI GPIO with an add block as shown in the screen shot below for GPIO_0. This should still give you the ability to manipulate the data as you were wanting with your block design. I added my project which should give you a starting point. hope this helps!

cheers,

Jon

zed_gpio.zip

zed_gpio_pic.jpg

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2 hours ago, jpeyron said:

Hi GreatGBL,

I would suggest to add your changes before the AXI GPIO with an add block as shown in the screen shot below for GPIO_0. This should still give you the ability to manipulate the data as you were wanting with your block design. I added my project which should give you a starting point. hope this helps!

cheers,

Jon

zed_gpio.zip

zed_gpio_pic.jpg

 

 

Yep,that is what I need, I want to ask how could I add my own block?

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