ARTY Bootloader Quad SPI?

[Billwaa]

Hi, I am very new to FPGA, so I apologize ahead of time if I am doing something very dumb here. 

I got an ARTY Artix-7 board and is following the tutorial online. 

I did this one to set up Microblaze:

https://reference.digilentinc.com/learn/programmable-logic/tutorials/arty-getting-started-with-microblaze/start

 

And then I did this one to set up Quad SPI to flash Microblaze using the .bin file:

https://reference.digilentinc.com/learn/programmable-logic/tutorials/arty-programming-guide/start

 

Now I am trying to store a SDK file in flash so that the FPGA will boot with it:

https://reference.digilentinc.com/learn/programmable-logic/tutorials/htsspisf/start

 

The problem is that when I try to select the SREC SPI Bootloader template, it wouldn't let me. It gave me an error message "This application requires a AXI Quad SPI in the hardware". But I did set that up under the Synthesized Design / Edit Device Properties / Configuration Modes. I did have to manually launch SDK because it wouldn't open correctly inside Vivado. I basically create new application, add new hardware using the hdl file generated when doing Export Hardware in Vivado. Maybe the Quad SPI properies didn't get carry over?

 

Any help will be appreciated, thanks!

 

[jpeyron]

Hi Billwaa,

What OS are you using? What version of Vivado? Does your Vivado block design look like the attached screen shot?

[timseverance77]

jpeyron,

   I am also trying to do this, and I have added the axi_quad_spi like you show, but I see you have the quad_spi "spi_clk" connected to the clocking wizard output 3.   Can you please tell me what clock frequency this is?   Is this setup explained in some page, I cannot seem to find any example project or help in setting up the quad_spi on the Arty board.   I am wanting to use the tutorial you have at the link below (How To Store Your SDK Project in SPI Flash), but it assumes we already have a working spi_flash project which I can't seem to find any help on.

https://reference.digilentinc.com/learn/programmable-logic/tutorials/htsspisf/start

 

Thanks.

Tim

[D@n]

@timseverance77,

You should be able to run the Arty Flash SPI port at speeds up to 100MHz.  Indeed, the chip is spec'd for 108MHz, but I've only tested it up to 100MHz.  Whether or not the Xilinx provided core works that fast is ... a different question. 

Dan

[tsimons]

I am also looking for help on how to set up the QSPI so I can use the "How To Store Your SDK Project in SPI Flash" tutorial. My board diagram has all the same parts as the one above, and I went through the documentation to figure out the correct frequency for ext_spi_clk. My SPI block as an extra port "STARTUP_IO" which is there because I selected the qspi flash as the interface. I am on a Genesys 2 board and connected my output to the QSPI Flash output. Is this right? Originally Vivado automatically connected it to DSPI. Can I leave the STARTUP_IO output port with out any connections?

[jpeyron]

Hi @tsimons,

Here is a forum thread that deals with you question as well as a couple of other issues that you might run into using the Genesys 2 and the quad spi flash.

cheers,

Jon

[tsimons]

Thank you jpeyron! I was able to get it working with the hardware set up that I had. I was having a problem with the bootloader and the xilifs library. My the bootloader didn't have the specs for the QSPI on the Genesys 2. I manually updated using the newest code from Xilinx and it worked.  

[jpeyron]

Hi @tsimons,

Glad to hear you got your design working and thank you for sharing how!

cheers,

Jon