I am trying to implement a 4 tap FIR filter on the Basys 3 board.Basically,I feed the ADC with an analog sine wave signal that will get digitized (12 bits) that get fed into the FIR filter( low pass filter 400Hz cut off freq)the output of the FIR filter will drive a 8 bit PMOD DAC.
My question is as follows:
1.When I use the on board 12-bit ADC ,do you have some VHDL sample code to show how the A/D conversion would be implemented for this case?
2.During filtering I assume I would multiply my 8 bit coefficient with the 12 bit word from the ADC ending up with a 20 bit word.Now I need to scale this down to 8 bits to drive my DAC.How would I do this in VHDL?
Any info would be appreciated.I was not able to find any ADC VHDL sample code for this board if you can provide a link that would be great.
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Hendrik
Hi there,
I am trying to implement a 4 tap FIR filter on the Basys 3 board.Basically,I feed the ADC with an analog sine wave signal that will get digitized (12 bits) that get fed into the FIR filter( low pass filter 400Hz cut off freq)the output of the FIR filter will drive a 8 bit PMOD DAC.
My question is as follows:
1.When I use the on board 12-bit ADC ,do you have some VHDL sample code to show how the A/D conversion would be implemented for this case?
2.During filtering I assume I would multiply my 8 bit coefficient with the 12 bit word from the ADC ending up with a 20 bit word.Now I need to scale this down to 8 bits to drive my DAC.How would I do this in VHDL?
Any info would be appreciated.I was not able to find any ADC VHDL sample code for this board if you can provide a link that would be great.
Thanks allot
H
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