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whoooo

Issues with dvi2rgbEDID files on Zybo

Question

I'm using a Zybo for some video processing applications. I've been using the most recent Digilent dvi2rgb and rgb2vga IP to take in HDMI video and send it out over VGA after processing. I have my IP set up in a local repository (including IP that I've created, Digilent IP, IP from other sources, etc.), which I add to each project via Project Settings --> IP --> Repository Manager. I've been having an issue with the dvi2rgb IP block; when I first add it to a project and run synthesis, it fails and gives me the following errors: dvi2rgb_errors.PNG

I can fix it by moving the (720/900/1024/1080)_edit.txt files into my project sources folder (i.e. project_name -> project_name.srcs -> sources_1 -> bd -> bd_name -> ipshared -> 050c -> src), but I have to repeat this every time I start another synthesis run, as the .txt files are cleared out. I can set the src folder permissions to not allow any deletions, but it's a clunky workaround and I feel like there's a better way. I've also tried adding the .txt files as sources in Vivado, which doesn't do anything. I've tried editing the block in the IP packager, where I was able to add the full path to the .txt files (C:/users/name/.../1080_edid.txt) instead of the relative path looking in the same folder as the the IP, but when I went to repackage the IP it seems that some things were overwritten or weren't set correctly, and I had to go back and re add all the IP GUI options and whatnot, and it seems that the timing constraints were removed in the process, which led to a lot of issues when trying to use the modified IP. Has anyone else using the dvi2rgb IP had these issues, or know of another way to get around this?

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@whoooo

I've run into this issue with the dvi2rgb before myself while looking into the NexysVideo HDMI demo, but haven't gotten to looking for a workaround. We're working on updating many of our demos to 2016.4 and this one is on the list. There might be a slightly less clunky workaround that could be done by adding a pre-synthesis TCL script that re-includes the edid file/s each time Synthesis is run - adding the script through Synthesis Settings -> Synth Design -> tcl.pre - but I haven't tried this personally and don't know if it will work.

-Arthur

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