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Measuring the time of execution on FPGA, in vivado


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Hello there,

I have developed an image processing algorithm using the system generator and Generated the HDL netlist. Now i need to send the image file to the Verilog code generated, and compute the output and measure the time.

Can anyone please help me in understanding how i should, input the image, get the output and then measure the time of execution on ZED board?

Thanks in advance. 

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@shashi

Assuming that you are bringing the image onto your zedboard from a PC, your best option is probably to set up an ethernet connection to your board. This tutorial was written for the Zybo, but should still apply. Once you have a server running, and can pass received data to your algorithm, you will need to get the image data into a format that you can send. You have a few options here, you could use some sort of script to communicate with the board (for Python, possibly this library, looks like a significant challenge), or you could parse the image data into a format that whatever serial terminal you are using could accept - for TeraTerm, you would need to write a program to convert your image data into a Tera Term Macro, reference information here.

Hope this helps,

Arthur

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@shashi

And as for determining evaluation time, you create a timer by running a set of counters in parallel to the module/s your algorithm is implemented in, starting the timer when you start processing the image, and stopping when it has completed. From there, you can return the elapsed time (in clock cycles, or whatever format you want to convert it to) to your PC over the serial connection you are using for data. The answers to this question may provide a good starting point.

Hope this helps,

Arthur

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HI Arthur,

Firstly thanks a lot for replying. The procedure looks little complicated. But surely I will give it a sincere try. 

I got one other idea. I packaged my HDL file into IP core and planning to write an application in SDK to send an image. Is that a better idea?

I need your expertise on this? Can you please help me since I am relatively new to this area?

thanks again for your help.

Regards

shashi

 

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@shashi

Using the Zynq and SDK will certainly make it easier to initially implement something, I still have concerns about the speed of transmission - the AXI bus between Zynq and your IP core can be a bit slow - but you can try to get your project running first, and then try to find a faster way to run it. Try running through the Getting Started with Zynq Servers tutorial, as it should get you started.

Hope this helps,

Arthur

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