accessing Usb Uart pins through PL

[karthik7]

Hi,
I am working with leon3 Zedboard template Design on Zedboard for my project.
I want  to use Usb Uart pins for  uart communication between my hardware logic and my pc.
I have tried with different  possible locations of Uart D11,C14,D12,B10. and also I have tried Pmod pin locations to use it as pmod Uart converter.
I have ended up with this error :
ERROR: [Drc 23-20] Rule violation (UCIO-1) Unconstrained Logical Port - 2 out of 152 logical ports have no user assigned specific location constraint (LOC). This may cause I/O contention or incompatibility with the board power or connectivity affecting performance, signal integrity or in extreme cases cause damage to the device or the components to which it is connected. To correct this violation, specify all pin locations. This design will fail to generate a bitstream unless all logical ports have a user specified site LOC constraint defined.  To allow bitstream creation with unspecified pin locations (not recommended), use this command: set_property SEVERITY {Warning} [get_drc_checks UCIO-1].  NOTE: When using the Vivado Runs infrastructure (e.g. launch_runs Tcl command), add this command to a .tcl file and add that file as a pre-hook for write_bitstream step for the implementation run.  Problem ports: uart_tx, uart_rx.
Could you Please provide me a solution to get the uart  output to pc from PL.
Thank you
With best regards
Karthik7

[D@n]

@karthik7,

You'll need to make certain your XDC file maps your uart_rx and uart_tx pins to actual device pins.  Take a look in the master XDC file for your device to see how this is done.  Watch your spelling too--Vivado doesn't recover well if the port name spelling in your top level file doesn't match the port name within your XDC file.

Dan