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VHDL read from BRAM



I have a block design with a microblaze, a BRAM, and a custom ip (VHDL). With the custom IP, I have 4 separate signals that will read at the same time from 4 consecutive rows in the bram and output the values. I'm having trouble figuring out how to read 4 separate signals from a single BRAM at the same time. Any advice is much appreciated. 




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Depending on the required speed of your project, it may be simpler to have your read process step through the needed bram addresses and do each read on a different clock cycle - this will be slower than reading four at once, obviously.

It also may be helpful to group data elements within the same memory address - this depends on how the data needs to be read, if the four element reads don't overlap with one another, you can store the data in words.

If you don't need a lot of memory, you can set up an array of std_logic_vectors, which can then be sliced to pull out multiple data elements at a time using normal array notation. This *may* work for inferring ram as well, I'm not particularly familiar with vhdl. This page seems to be a good reference on how to implement this style of memory.

Hope this helps,


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