Interface Pmod Headers With Vivado/SDK

[Reid Telando]

Hello Digilent Community,

I'm a university student working on a senior design project with a Zedboard, so I'm just getting my feet wet in this FPGA world. Part of my senior design project requires reading voltages into the FPGA from the on board Pmod headers, as well as outputting voltage from the FPGA to the Pmod Headers. Using a tutorial for writing code to power the onboard LEDs I am trying to modify my system and my SDK code to output a similar signal (preferably the 3.3VCC DC voltage) to a Pmod header. I found some blocks online that I downloaded that looked like they could be used in my block diagram to write to the Pmod Headers. (The block I used is called Pmod_GPIO_0_0). I'm now searching for some sort of C code that writes to the Pmod headers through the SDK. Perhaps I'm way off target here. Any direction would be greatly appreciated.

 

The blocks I downloaded were from this link: https://github.com/Digilent/vivado-library

[artvvb]

@Reid Telando

To read Analog Values, you have a few options, first, to get the onboard XADC header working, the links in the answer/reply to this question on the Xilinx website looks intriguing, though I haven't tried to use this component before myself. Another option would be to find yourself an ADC Pmod of some sort, AD1, AD2, or AD5. Of these, the AD1 and AD2 can be connected to the Zynq through Digilent produced IP cores following this tutorial, and include basic C libraries.

As with the ADs, you have some options for DACs, it sounds like you are trying to output a PWM signal off of your board in order to create a DC Voltage, if this is the case, you will likely also need a capacitor to level out this signal. For LEDs this process works fine, as the pulse on-off of the PWM is running too fast for the human eye to see, but depending on how you use the signal coming off of the board, you likely need to flatten it. The other option is to check out one of our DAC Pmods, the DA1 and R2R both come with the aforementioned IP cores. I'm partial to the R2R personally, as it's really simple to use - a zero to VDD signal is created by putting the equivalent 0 to 255 binary signal out over the Pmod port - though not the fastest option, so here's a link to an instructable I wrote a few months back on using the R2R to output sine waves in pure HDL.

Hope this helps,

Arthur