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Can I program zybo in PS and PL?


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Hi Sophia,

I think the short answer to your question is yes, that is doable. However, if you want to use the BRAM IP provided by Xilinx, I don't think that you can have your PS writing values and have your PL reading them directly. You will probably have to read and write from PS alone. So when your PL logic needs to read a value, request it from the PS somehow and have the PS send the desired value via a FIFO buffer or a receive register in a custom IP. If you want to really get tricky you could probably throw a DMA controller in there if you are reading large chunks of data.

Here is a guide to creating an axi custom IP core. This allows you to use the axi interface while writing your own logic in HDL.


Hope this helps,


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