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ERROR with PmodOLED IP and Vivado Board File


Question

Hi,guys

I am using the Digilent Vivado IP library and Vivado Board File for Digilent FPGA Board. 

I create a project with MicroBlaze and PmodOled IP core. In the Block Design, I want to connect the JA Pmod with the PmodOled IP output. There is a error after right clicking on the JA in Board tap. 

aa8780456_1480692485039_88.png

the error is :

aa8780456_1480692452661_74.png

 

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