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Stefan

How to use the CoolRunner II CPLD Starter Board for ISP JTAG Programming?

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Hi there,

I've just started with CPLD design, using the Digilent Coolrunner II CPLD starter board (Rev. 3.0) and successfully synthesized my code with the Xilinx ISE development software.

I would now like to integrate a Cmod breadboardable CPLD module into one of my projects. I don't own a programming cable/adapter, so I was wondering if I could use the Starter Board as a programmer via its JTAG interface.

Looking at the schematic, I could not find a way to connect a JTAG daisy chain with another external CPLD, because the JTAG signals are all connected in parallel.

Would it be possible to simply not power the CPLD on the Starter Board (detatching JP2) and connect the external CPLD to the JTAG pins?

Best regards

Stefan

Edited by Stefan

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@Stefan,

This all sounds reasonable, although I'll admit I'm getting a touch lost in the details--especially keeping track of the two CPLD boards you would be using and what you intend to do with each of them. 

Perhaps the question I would want to ask is, are you hoping to control the JTAG port with your own controller/software, or with Xilinx software?  (If you've never rolled your own before, looking over the Xilinx configuration guides, it looks quite doable.  Personally, I've always wanted to see if I couldn't program something by controlling the JTAG port myself, I just haven't gotten around to it yet. :D)

Dan

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Hi Dan,

thanks for your reply. I used the Xilinx ISE webpack development software and programmed a linear shift register for pseudo noise generation (audio frequencies) on the CPLD starter kit board. This part worked out fine so I probably stay with the Xilinx software for now. I am looking for a way to program an external breadboardable CPLD with the JTAG port from the starter kit. So it is more a hardware concern. Unfortunately, it's seems not very feasible to connect a JTAG chain with an external CPLD as far as I can see from the schematic. So my Idea is to just connect both CPLDs in parallel on the same JTAG port and power only the one I would like to program.

The thing I am concerned most is if the powerless CPLD could get damaged or something by this. I'm not much experienced with CPLD programming, but at least I have to suspect that some unpredictable things may happen if some unpowered pins are connected to the JTAG port while programming.

I've just ordered the breadboardable CPLD and would give it a try next week, I think.

Thanks

Stefan

 

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@Stefan,

Ahm ... yes, if you try to hook the two JTAG's in parallel, then both chips will try to drive the TDO pins and therefore you truly might damage your part.  If you only power one chip, you might find that the "leakage" power from placing powered I/O into the non-powered chip is enough to partially power it and ... that's not going to help you. 

Dan

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