PmodDA3 (and Zybo)

[Jun]

Hello, I'm new to use PmodDA3,  and could get it partially worked but not fully understood.

I appreciate if you could help me.

 

(1: J3 pin, J1 jumper)  When I connected J3 pin 1 and 2 to a constant voltage source with monitor, I saw +3.2V voltage appeared by before applying external voltage.

I don't understand why this happens. Seen from the schematic drawing J3 pin 1 (AVdd) is connected to Vdd of AD5541A, Vlogic of AD5541A, Vin of  ADR441 and V+ of AD8605.

All those ports would act as input, not output.

I did the first test with an internal reference, but more intereseted in using the module with the external reference. 

Then, for use with Vext >3.2V, should I just force to apply larger voltage difference?

How about for Vext <3.2V?

In either case, can I leave the J1 jumper connected?

 

(2: Voltage clipping) My first test was to generate a saw wave from 0 to 65535 at a sampling rate of 0.868MHz (so 1 cycle = 75.5ms).

Seen with a 50Ohm-terminated oscilloscope, the output lineary increased from 0V but after ~55ms it saturated at 1.9V.

Because this is the very first test I might have made a mistake in VHDL coding, but could you imagine other possibility?

 

Thanks in advance.

[JColvin]

Hi Jun,

Unfortunately, the output range will still only be from 0V to 2.5V. The reason for this is because pin 4 on the AD5441A (the reference voltage pin) is set with the 2.5V reference. According to the associated datasheet, the output voltage is dependent on this and will only range from 0V to whatever that voltage reference is.

A higher reference voltage (as high as Vdd) could have been provided rather than the 2.5V reference, but I'm uncertain as to the reason why it was not done; even the datasheet for the chip recommends multiple times (at least in the pin description sections) that the reference pin is connected to a 2.5V reference voltage. I don't know if this is because the chip performs better at that voltage or some other reason, but regardless of how frustrated the two of us might be over this, the maximum output voltage in this case is 2.5V.

I'm sorry I couldn't be of more help.

Thanks,
JColvin

[JColvin]

Hi Jun,

I personally can't speak towards your second question, but in terms of the first question I suspect (I don't know for certain) that (presuming JP1 has the jumper loaded) that you are seeing a voltage a J3, pin 1 because of the connection to DVDD via the jumper. The jumper exists so that the AD5541A has a voltage supply on pin 1 and a reference voltage on pin 4 (from the ADR441). If you are applying your own external voltage, you can remove the JP1 jumper to help ensure that no "back-powering" occurs to the Pmod host port. Beyond that, you would only need to make sure that the voltage applied to AVDD (pin 1 on J3) is between 3.0V and 5.5V, as per the schematic note. Let me know if this makes sense.

I'll ask some of our applications engineers about your second question.

Thanks,
JColvin

[Jun]

Thanks, JColvin.

I understood that JP1 jumper must be removed for use with external voltage.

Regarding the second point, I think I should describe a bit more detail.

The board was Zybo, Pmod ports were JB7-JB10 and USB-powered.

I applied external voltage and when it was between 4 to 5V, saturation disappeared.

With 5V supply, the output range was from 0V to +2.5V.

Is this correct or something still wrong? (I imagined that I should get 0 to +5V output ).

[jpeyron]

Hi Jun,

I found an verilog example here and a microcontroller example here. Here is a thread that deals with adc and dac on zynq. Hope these are good references!

cheers,

Jon

[Jun]

Dear JColvin, jpeyron,

Thanks for advices. I assume that the control has been established and continue to develop further systems.