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analoghb

PmodAD5 with Zedboard

Question

Hi,

I'm trying to make PmodAD5 work with a Zedboard by using Vivado 2016.2 (can also use earlier versions if needed). Digilent has a nice wiki pages to use Pmods with Zedboard, especially for using Pmod IPs:

https://reference.digilentinc.com/learn/programmable-logic/tutorials/pmod-ips/start

In this tutorial, however, there is no PmodAD5, and there reference design linked from Digilent product page to AD also has the implementation example for Xilinx ISE 14.4:

https://wiki.analog.com/resources/fpga/xilinx/pmod/ad7193

Nevertheless I tried to combine the information I could find to start with a ZYNQ7 Processing System with AXI Quad SPI IP.  (I managed to work with that way with a MAXIM Pmod temperature sensor).

But I got stuck at some point as to communicating with PmodAD5 device. After HW and SW implementation I am getting the following output on the UART:

Status Register: 0x0

Mode Register: 0x0

(The second one should be different than 0x0 according to documentation)

Is there someone out there tried PmodAD5 with Zedboard who could help me?

 

Since this is my first post I tried to explain the overall status. If there are questions specific to the project I am more than happy give additional info.

Thanks.

 

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Hi analoghb,

I am planning to use PMOD AD5 with zedboard. I was looking for a tutorial, but couln't get end to end solution. Can you please help me with this?

Thanks in advance

Jeet

 

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Hi @Jeet Gandhi,

Unfortunately, we haven't had time to dedicate to making a library/tutorial or an IP core for the PmodAD5.  Here is a another thread that works through using the PmodAD5 in VHDL that might be helpful. Are you wanting to use the Zynq possessor? One potential solution would be to get the PmodAD5 working in HDL and then use the add block feature started in vivado 2016.x to connect to a axi gpio block. 

thank you,

Jon

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Hi @jpeyron,

Thank you Jon for your immediate reply.

What I thought was to use SPI drivers provided at link: https://github.com/analogdevicesinc/no-OS/tree/master/Pmods/PmodAD5. This can be dumped into zynq processor, which will take care of SPI communication and will give 24 bit output. I can use this output in Programmable logic through AXI bus.

Is this approach feasible? If yes, can you please give some guidance how to implement it? Till now I worked with hardware co-simulation using Xilinx system generaotor in Matlab. I don't have much exposure to HDLs.

Regards,

Jeet

 

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