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Use Of On-board Clock In Basys3

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I got the following error when I tried the Generate Bitstream step.


ERROR: [Drc 23-20] Rule violation (NSTD-1) Unspecified I/O Standard - 1 out of 6 logical ports use I/O standard (IOSTANDARD) value 'DEFAULT', instead of a user assigned specific value. This may cause I/O contention or incompatibility with the board power or connectivity affecting performance, signal integrity or in extreme cases cause damage to the device or the components to which it is connected. To correct this violation, specify all I/O standards. This design will fail to generate a bitstream unless all logical ports have a user specified I/O standard value defined. To allow bitstream creation with unspecified I/O standard values (not recommended), use this command: set_property SEVERITY {Warning} [get_drc_checks NSTD-1].  NOTE: When using the Vivado Runs infrastructure (e.g. launch_runs Tcl command), add this command to a .tcl file and add that file as a pre-hook for write_bitstream step for the implementation run. Problem ports: CLK.


I am using the following statements in my .xdc file.


set_property PACKAGE_PIN W5 [get_ports clk]                                                                                                              

                set_property IOSTANDARD LVCMOS33 [get_ports clk]

create_clock -period 10.000 -name sys_clk_pin -waveform {0.000 5.000} -add [get_ports CLK]


What am I missing ?  Please help!

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Thank you, gmv.  It certainly helped!  (Oh, Alex, I double checked to make sure I'd uncommented the whole line.)  Now, the statements in the .xdc file after editing the I/O Std column are exactly the same as what I have previously put in!  Anyway, now I am able to generate the bitstream and program the device.


Thanks a lot!

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