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noir

Cmod A7 boot using srec spi bootloader

Question

Hello,

I am following this guide to program the spi flash on the Cmod-A7 so that it can boot from spi flash and run the program in the ddr.

https://reference.digilentinc.com/learn/programmable-logic/tutorials/htsspisf/start

However, after flashing both parts, the bootloader is able to run but it only outputs infinite "Bootloader: Processed (0x)0000022a S-records" and my program won't run.

Thanks and best regards!

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@noir,

When you say the Cmod-A7 outputs infinite "Bootloader: Processed (0x)0000022a S-records" do you mean that it starts counting up from address 0x0 and stops at 0x22a or that it starts at 0x22a and just idles there? It sounds like the program might not have the correct offset in flash so only part of the program is saved to flash. Are you just trying to save a "Hello World" program in flash like in the tutorial? When I run the program from flash it only counts up to 0xcd.

One of the few issues with the Cmod-A7 is its limited flash memory (4MB). Although this is small, when using a uncompressed bitstream and utilizing most of your FPGA in your block design your bitstream at its largest should only be around 2MB. I think it would be worth your time to go back and generate a compressed bitstream and try the tutorial again or at the least, experiment with lowering your offset. Hope this helps!

 

Mikel

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1 hour ago, mskreen said:

@noir,

When you say the Cmod-A7 outputs infinite "Bootloader: Processed (0x)0000022a S-records" do you mean that it starts counting up from address 0x0 and stops at 0x22a or that it starts at 0x22a and just idles there? It sounds like the program might not have the correct offset in flash so only part of the program is saved to flash. Are you just trying to save a "Hello World" program in flash like in the tutorial? When I run the program from flash it only counts up to 0xcd.

One of the few issues with the Cmod-A7 is its limited flash memory (4MB). Although this is small, when using a uncompressed bitstream and utilizing most of your FPGA in your block design your bitstream at its largest should only be around 2MB. I think it would be worth your time to go back and generate a compressed bitstream and try the tutorial again or at the least, experiment with lowering your offset. Hope this helps!

 

Mikel

Hi Mikel,

Thanks for your reply. The message starts from 0x0 and seems to idle after hitting different addresses each time I powered on the board. I was running the FreeRTOS Hello world so it's a larger program but it's still less than 500KB.

I already compressed the bitstream and I set the offset to 0x00200000 which should give the program enough space. I'll try the smaller "Hello World" program to see if it would start.

BTW I have some more question:

1. So normally the bootloader would output all the addresses of the program stored in the flash? Can I turn this off to speed up booting?

2. I read the datasheet for the Micron flash N25Q032A and it says max frequency is 108 MHz, does this mean I can use 100 MHz clock for the AXI Quad SPI IP in the block design for interfacing the flash?

Thanks and best regards,

noir 

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Hi Noir,

For question 1)  As of yet, I have not been able to have the hello world work when removing the print statements or stop the function call or comment out the #define VERBOSE. 

For question 2) I was able to have a 100MHz clock driving the quad spi with the hello world.

hope this helps!

cheers,

Jon

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The 108MHz QSPI clock you mention is the SPI clock going across the interface, not the clock used by the interface controller, which is usually twice that speed.  Hence I would expect a 100MHz controller clock to drive the interface at 50MHz.

It is possible to get the interface to run at 100MHz.  My efforts to do so ran the interface controller at 200MHz.  There are all kinds of details regarding what must be done to make this happen.

Dan

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1 hour ago, D@n said:

The 108MHz QSPI clock you mention is the SPI clock going across the interface, not the clock used by the interface controller, which is usually twice that speed.  Hence I would expect a 100MHz controller clock to drive the interface at 50MHz.

It is possible to get the interface to run at 100MHz.  My efforts to do so ran the interface controller at 200MHz.  There are all kinds of details regarding what must be done to make this happen.

Dan

Hi Dan,

Thanks! What I was asking is the clock used for the ext_spi_clk, which I expect to be the SPI clock connecting to the flash. I was wondering if the clocking is causing my problem so I asked about this.

However I just tried the small "Hello world" example program and it's able to boot and run, but it take around 22 seconds to boot. And the boot loader message goes up to "Bootloader: Processed (0x)000001dc S-records" Now my problem is why it boots so slowly.

Best regards,

Noir

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4 hours ago, jpeyron said:

Hi Noir,

For question 1)  As of yet, I have not been able to have the hello world work when removing the print statements or stop the function call or comment out the #define VERBOSE. 

For question 2) I was able to have a 100MHz clock driving the quad spi with the hello world.

hope this helps!

cheers,

Jon

Hi Jon,

I just tried the small "Hello world" example program and it's able to boot and run, but it take around 22 seconds to boot. And the boot loader message goes up to "Bootloader: Processed (0x)000001dc S-records" Could you please tell me how long does it take for yours to boot?

I have been using Cyclone V and Nios II before with a 1-bit SPI flash, and it boots fairly quickly, almost instantly.

Best regards,

Noir

Edited by noir

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Hello all,

I just tried comment out the #define VERBOSE in the bootloader and now even the FreeRTOS program boots very quickly. It turns out it needs way much more time to boot with verbose on.

Thanks,

Noir

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@noir,

 

Just tried this (commented the #define Verbose) and I can already see a significant decrease in the amount of time it takes for my program to load through flash.

Very cool, good find!

 

Mikel

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