1-bit Adc With Input From Signal Generator Nexys4

[Almost1]

Hello all! New to the forum, but not to Nexys FPGA's. I have a project I'm working on and the only thing I am unclear about is how I am going to get my input signal to the board. I need the controller to recognise a varying rectified square wave (essentially just pulses that can change in frequency). I'm thinking of using the onboard ADC as a 1-bit converter giving me a 0 when there is no voltage and a 1 when the pulse arrives. Is this possible? I am not familliar with using ADC's. Does the voltage the ADC use for referance have to come from the board itself or can I use external voltage from the signal generator I have? Any input is greatly appreciated!

[hamster]

Hi Almost1,

 

As a followup to JColvin, you may be able to use a differential pair in a way that may achieve what you are after.

 

Some of the FPGA I/O pins are 'pairs', for use in LVDS or TMDS or other differential I/O standards. 

 

If you connect the reference voltage to the Negative side of the pair, and the incoming signal to the positive pin of the pair then the output from the differential input buffer will indicate if the input is higher/lower than the reference voltage.

 

Just make sure that your voltages fall within the range of the selected I/O standard - see the DC and Switching data sheet for your FPGA.

 

You must take care choosing which pins to use, as they + and - is decided by the physical design in the FPGA - you can't just pair any two random pins.

 

In VHDL it is something like this:

   ...
library unisim;
use unisim.vcomponents.all;
    ...
i_IBUFDS : IBUFDS
  generic map (
        DIFF_TERM => FALSE,
        IBUF_LOW_PWR => TRUE,
        IOSTANDARD => "DEFAULT")
   port map (
        O => test_signal,
        I => test_signal_p,
        IB => test_signal_n
    );

[JColvin]

Hi Almost1,

 

ADCs (Analog to Digital Converters) will give you an inputs of 0's and 1's, but because ADCs are an integrated circuit, you would not be able to change the on-board ADC from a 12-bit converter to a 1-bit converter. You could opt to read only 1 bit from the ADC, but it will still take the incoming analog signal and convert it into digital bits. It sounds like using one of the digital inputs on the Pmod connectors would be more suited to your application as it would report to you a '0' when there is no voltage and a '1' when there is a high voltage from your incoming square wave. 

 

As for the voltage reference, I don't believe you can change the internal reference for these digital inputs, but I'm more of a microcontroller guy so I'm not sure if would be possible to change those voltage references in an FPGA. The on-board ADC can act as a differential input, so you can compare an incoming signal to your reference signal to determine if the output should be 0 or 1, but there will be limitations on how much voltage you can apply to the inputs of the ADC.

 

As for changing of frequency within your square wave, the Nexys 4 would just need to be fast enough to catch the rising edge of your incoming square waves, so as long as your incoming frequency isn't ridiculously fast, you'll be able to catch when the voltage changes occur via polling (or an interrupt method).

 

Let me know if you have any more questions.

 

Thanks,

JColvin

[Almost1]

I'm sorry for asking, but how would this look in verilog? I've never done anything involving ADC coding with FPGA's and am not very good at vhdl.

 

Thanks for any help!

[hamster]

I'm sorry for asking, but how would this look in verilog? I've never done anything involving ADC coding with FPGA's and am not very good at vhdl.

 

Thanks for any help!

In Vivado iIn the "templates" tab you should be able to drill down through your architecture and preferred language and find the Differential Input Buffer example.

ISE also has the same, but I can't remember where it is - something like "Language Templates" off the Edit menu. However, it will look something like this:

IBUFDS #(
.CAPACITANCE("DONT_CARE"),
.DIFF_TERM("FALSE"),
.IBUF_DELAY_VALUE("0"),
.IFD_DELAY_VALUE("AUTO"),
.IOSTANDARD("DEFAULT")
) IBUFDS_inst (
.O(DATA_IN),
.I(DATA_IN_P),
.IB(DATA_IN_N)
);