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Zybo Board files and xdc from Git are faulty


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Hello,

The board files and the XDC from the reference page here are not faulty. The thing that draws my attention on this screenshot is that you don't have a Zynq IP in your design. The the absence of that IP you don't have what leds to connect to the AXI GPIO. Please follow this tutorial on Getting Started with Zynq and tell me if you have further problems with the board files, XDC file or the board itself.

Best regards,

Bianca

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Hello,

I tested this design in vivado 2016.1 with not issue as shown below. Could you please take a screen shot of the error you found in the vga_r along with the errors you have with the design. The errors I am able to make out from you initial post seem to be related to trying to have led_4bits on both GPIO and GPIO2.

 

thank you,

 

Jon

zybo_gpio_esc.jpg

Edited by jpeyron
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