UART communication control with CMOD A7

[Antonio Daril Crispino]

Hi everybody,

I have to communicate with the FPGA on my CMOD A7 board through the on board FTDI FT2232HQ chip. While on a PmodUSBUARD, for example, I can use the RTS/CTS hardware wires for the flow control, on the board datasheets it's written that I can only use the TX and RX hardware wires and that there are no RTS/CTS wires (fact confirmed by the board .xdc file too). How can I set reliable control flow for my high-speed communication (from 6Mbaud to 12Mbaud) ? Any advice?

Thank you in advance,
Antonio Daril Crispino

[D@n]

I have two ideas to offer for you to consider:

The first is software flow control.  Under this scheme, you would arrange to have the device send an XOFF command (Ctrl-S) when it's queue is nearly full, and XON (Ctrl-Q) when it's ready to receive again.  Of course, this has the problem of suffering the transmit time of the XON/XOFF command, so it will slow you down a touch.

The second idea is to just know your algorithm.  Know how big the internal buffer size of the device is, and only send that many values until you have confirmation from the device that it can receive more.

Will either of these work for you?

Dan

[Antonio Daril Crispino]

I chose the second option, because I don't wanto to slow down the execution. So I made the TX and RX buffers greater than the maximum number of elements sent and received. So, there is no way to control the flow in hardware? I use the two xilinx functions XUartNs550_RecvByte() and XUartNs550_SendByte(). They only do a control on the two fifos to see if there are elements to send/receive, or not. There is no need the control or set RTS and CTS values? Is this enough, or should I implement a somewhat software flow control in SDK before calling these two functions?

Sorry for the exagerate number of questions 

[D@n]

Do keep in mind: RTS/CTS only ever controlled the flow in one direction.  The reverse link needs DTR and DSR, which I have not seen in any of the DIgilent UART implementations.  So in the end, you have to build your application wisely.

Is there a way to add hardware flow control?  Well, I suppose.  I mean, the S7 does have a wonderful number of I/O pins.  I'm sure you could imagine a solution.  It might require another board, some extra wires, etc.  It wouldn't be my choice, though.

"Is this enough ..."?  I really can't say.  It depends upon your application.  How fast are you sending, how many clocks does each byte take to transmit, how busy is the micro processor?  How deep is your buffer?

These are application specific questions that you are more qualified to answer than I.

Dan

[Antonio Daril Crispino]

Thank you so much for your answers. You have been really helpful. Yes, clearly they are application specific matters, so I'll find the application specific best solution. 

Have a good day,
Antonio

[dftmax]

With no schematics of the FTDI part of the CMOD A7, UART details are shrouded in mystery....

First question. On the WIndows 10 device manager window, I see that the CMOD A7 appears as COM9 and COM10. I understand this is a consequence of using a dual channel FTDI chip the FT2232H? Which is the UART connection (*), the low numbered port or the high numbered? I think that they are known as A and B in the FTDI chip. I have tried using TeraTerm but it completely hung and couldn't be killed. I suspect I chose the wrong port and would like to avoid this in future.

I believe the other channel is used for JTAG and is proprietary.

In my application on the FPGA, how do I know when the UART USB connection has been opened? In Arduino sketches (for example) there is a while wait loop which waits for the USB serial port to be opened before allowing the code to continue. This means you don't miss any initial greeting information, although it does mean that you do have to open the USB serial port in order for the program to actually run. I guess the only way might be to sent a character from the PC to the CMOD A7 via the UART to indicate that the serial port is open?

 

[xc6lx45]

Hi,

it is not as mysterious as it may look at first glance: OK there is one GPIO that needs to be set (only for custom JTAG!!) then it will work like any other Xilinx/FTDI combo.
From a functional point-of-view, look at Papilio Pro schematics on Gadget Factory, it should be identical (there are some buffers, just pretend they don't exist).

The UART is one electrical wire FTDI-to-FPGA and one other wire vice-versa. What you're asking for is a protocol feature. This doesn't exist in hardware (at least not with the "conventional" two-wire UART interface. The FTDI chip might have additional signals e.g. CTS and RTS that are rarely connected on "conventional" Xilinx FPGA boards).

I suspect you have a driver issue. Teraterm should never crash, it just gives you a black screen and no echo.

If you do a trivial FPGA design and route Rx to Tx on the FPGA, Teraterm will echo back any characters you type. This is usually my first step to make UART work (if you happen to have another standalone FTDI board around, you can use a jumper wire as an experiment. Echo works with the wire connected and stops when disconnected)

 

 

[jpeyron]

Hi @dftmax,

I would first re-install the FTDI Driver. The Driver can be found here. Are you able to see the Cmod A7 in Adept 2 here.

thank you,

Jon

[dftmax]

Thank you for the replies. There is another issue which I need to explore further having read various messages in the forum. Programming the device in Vivado is very unstable, to the point I had to re-boot my PC. First I intend to get a high quality USB cable as suggested to see if this fixes the problem. Having read a suggestion in this forum I did install Adept2. Programming the device using this tool appeared stable, however I couldn't see how to program the SPI flash. I think that this is not possible with this tool for the CMOD-A7?

With respect to serial comms, it is clear there is no status coming from the FTDI which indicates a valid USB link has been setup. I can work around this. There is also no flow control. I can work around this too. One project of mine which ran on a different board, did use the flow control coming back from the UART, as I was sending lots of data to the PC, so having this feature was very helpful. On a different FPGA board I was forced to lower the baud rate so as not to get overruns on the PC. Perhaps Digilent and other FPGA board manufacturers might consider this in  the future?

The instability of programming in Vivado (which might be a cable issue) might have locked up the COM9 and COM10 ports, such that when I tried running TeraTerm it crashed. I will try again to establish whether COM9 or COM10 is the UART link. It would have been helpful if the documentation explained that two COM ports appear in the device list on the PC, with an explanation of how to determine which is the UART. I remember having the same problems with the Papilio board, as I was unaware that the FDTI chip established two COM ports (and I had several other COM port devices hooked up to confuse matters).

--Gary

[jpeyron]

Hi @dftmax,

I have sent you a pm about this.

thank you,

Jon

[dftmax]

Hi @blanca12. My current code only implements UART TX. There is no UART RX, and therefore no way to implement XON/XOFF. I have worked around this by slowing the baud rate down to a speed that TeraTerm can cope with, but this is far from ideal.

I was commenting that in future it might be worth considering adding an extra hardware line from the UART (RTS, DTR, CTS - I am unsure which is the right one!).

I did port my code to another FPGA board. This board uses an AVR for USB comms and does have signalling telling the sender to wait, so I could bump up the baud rate on this board.

For portability of code I may just use a regular FDTI UART and manually wire TX, RX and CTS(?).

--Gary

[amkichu]

What is the maximum UART baud rate that can be attained by UART in the CMODA7? I tried with 921600 (75*12288) bps which are successful but unfortunately slow for my application. When I tried with 1843200 (75*24576), random characters get displayed on loopback. My FPGA clock is 100 MHz. Can I be able to use a baud rate higher than 921600 at any cost? 

As a note, the datasheet speaks like

Data Transfer rate. The FT2232H supports a data transfer rate up to 12 Mbaud when configured as an RS232/RS422/RS485 UART interface or greater than 25 Mbytes/second over a synchronous parallel FIFO interface. Please note the FT2232H does not support the baud rates of 7 Mbaud 9 Mbaud, 10 Mbaud and 11 Mbaud.

Thanks in advance!

[D@n]

I've had mixed success with the Digilent chips above 1Mbaud.  I've used 1MBaud, 2MBaud, and even 4MBaud.  4MBaud works on one of my boards, but other boards require me to drop down a bit.  I can't tell if this is a manufacturing dependent observation, crystals with different tolerances for example, or if there are actually different FTDI parts on my boards that affect this.  I do think you'll find dividing your 100MHz oscillator by 25, 50, or 100 easier than whatever you are doing to create a 1843200 baud stream.

Dan