i'm trying to create a simple desing with a microblaze and a custom IpCore with axi stream comunication, but when i try to implement it, Vivado show me the followingmessage :
"[Place 30-640] Place Check : This design requires more RAMB36/FIFO cells than are available in the target device. This design requires 53 of such cell types but only 50 compatible sites are available in the target device. Please analyze your synthesis results and constraints to ensure the design is mapped to Xilinx primitives as expected. If so, please consider targeting a larger device."
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smarano
hi,
i'm trying to create a simple desing with a microblaze and a custom IpCore with axi stream comunication, but when i try to implement it, Vivado show me the followingmessage :
"[Place 30-640] Place Check : This design requires more RAMB36/FIFO cells than are available in the target device. This design requires 53 of such cell types but only 50 compatible sites are available in the target device. Please analyze your synthesis results and constraints to ensure the design is mapped to Xilinx primitives as expected. If so, please consider targeting a larger device."
how i can fix it?
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