Cmod A7 35t MicroBlaze SPI flash boot doesn't work

[Taisen]

Hi Guys,

I am following the instruction from Digilent about the booting MicroBlaze Project with SPI instruction, I got error right after I create the SREC_SPI_Bootloader using templete

https://reference.digilentinc.com/learn/programmable-logic/tutorials/htsspisf/start

after step 1.5, I got error:
"ddd.elf section `.rodata' will not fit in region `microblaze_0_local_memory_ilmb_bram_if_cntlr_microblaze_0_local_memory_dlmb_bram_if_cntlr'    ddd             C/C++ Problem"
"region `microblaze_0_local_memory_ilmb_bram_if_cntlr_microblaze_0_local_memory_dlmb_bram_if_cntlr' overflowed by 2864 bytes    ddd             C/C++ Problem"

I know this system only 4Mb Flash, so, the #define FLASH_IMAGE_BASEADDR  0x00300000. But, I even tried to change to  FLASH_IMAGE_BASEADDR  0x00000001, system still report me the same error.

Here is my system setup:

I am using 16K data cache and instruction cache. 

There is no error with "Hello word" project, I could run with no issue.

Did some one have this same issue or any suggestion for this?

 

[jpeyron]

Hi Taisen,

Sorry for the late response. Wanted to let you know we are looking into this situation and will be getting back to you as soon as we can. 

thank you,

Jon

 

[jpeyron]

Hi Taisen,

I was able to duplicate the error with your design. This is with microblazed local memory and cache set at 16k. If you up the local memory to 32k and keep the cache at 16k you will not get this error.

thank you,

Jon

[Taisen]

On 8/26/2016 at 2:24 PM, jpeyron said:

Hi Taisen,

I was able to duplicate the error with your design. This is with microblazed local memory and cache set at 16k. If you up the local memory to 32k and keep the cache at 16k you will not get this error.

thank you,

Jon

Thanks Jon, sorry for the late answer, this works for me, I changed the size and it will not report error anymore. Many thanks!!!