Need additional IO on Genesys board

[JColvin]

A customer on our website asked the following question:

This is regarding your Genesys Virtex-5 FPGA Development Board. We are considering the use of your board in a medium production system. Question: We are already using ALL of the IO connectors on your board. We need more digital IO. Can we remove the SODIMM and replace it with a board of our own design in order to allow more digital IO to be used? If so, can the signals driving the DOSIMM socket be used as normal 3.3V signals, or is the voltage reduced on these IO pins because they are designed to drive the SODIMM? Can the IO pins be used a LVDS pairs (i.e. did you route them in pairs to the connector)?

The response is below.

[JColvin]

Hello,

In principle, I suppose there isn't really anything stopping you from removing the RAM and replacing it with a chip of your own. Taking a look at the DDR2 Memory section in the Reference Manual, it appears that only the strobe and clock signals for the DDR were routed as differential pairs. It also says that the interface supports SSTL 1.8V signaling, although I do not know if all of the data lines could be changed to a different I/O standard (it sounds like you're hoping for 3.3V CMOS logic). I have asked some of our applications engineers for further input on this; they'll get back to you here on the Forum.

Thanks,
JColvin

[jpeyron]

Hello,

The voltage to the sodimm is 1.8V with a termination voltage of .9V . You would not be able have 3.3V digital IO. You might want to look into the Pmod IOXP here and see if this would help in your situation. I would also suggest looking at the Genesys 2  here due to the high pin count and multiple LVDS pairs with the fmc. I have included the Genesys schematic  as well. 

thank you,

Jon

genesys_sch.pdf