RTL guy metamorphosing to Microblaze guy

[Zermelo]

HI guys

I want to introduce myself , since I feel I will be around for a while. I am an FPGA designer with about 10 years experience in RTL IP design (mostly in VHDL), mainly for mission critical applications. My work has been always designing and verifying interfaces for the front end, typically ADCs/DACs, DDR memories , audio/video processing and some communication.

Now it is time for me to move to Vivado and go embedded, so I bought a Nexys DDR board for a project I m working in and want to experiment , mostly with microblaze. 

First thing I am trying is to configure the FPGA with an SDK application & .bit stored in the quad SPI (not much success for the time being)

Second thing will be creating an Ethernet memory mapped link between AXI peripherals in the Artix-7 and a Labview PC app, via the Microblaze. Any suggestion on how to start doing this will be very appreciated!

Hope to hear from you!

Z

 

 

 

 

 

[D@n]

@Zermelo,

Welcome to the wonderful world of soft-core CPU's on FPGAs!

I commend you on your goal of a memory mapped AXI bus controlled via ethernet (if I understand you correctly ...)  I have now created memory mapped wishbone busses with peripherals on them controlled by UART, JTAG, and DEPP.  I think you'll fund such a bus, whether wishbone or AXI, just naturally fits when it comes to controlling FPGA based peripherals.

Dan

[Zermelo]

Hi Dan,

I´m very happy to have purchased a Nexys4 DDR , and my goal is to prototype the core of a transceiver board for a sonar navigation echosounder. The FPGA will basically have a transmit stage,a receive stage , a housekeeping stage (plan to use the XADC there) and an command/status & data procotol over Ethernet.

Thanls for the Wishbone lonk, I´ll have a look. By now , my  immediate goal is to get familiar with the board by trying:

1- To access to separate memory areas defined in the FPGA. Maybe DPRAMs, or simple registers via the Ethernet link. I think I can modify the Echo server example to transmit back a constant in C code running in the microblaze, but new as I am to Microblaze, I have no idea on how to write a C Microblaze app that accesses simple AXI peripherals such as the ones mentioned. Any hint?

2- This repeats from my other post: but I don´t see why the DDR is used to store the application in the 1st Nexys 4 DDR tutorial (is nt that to overdimension things?). In the linker script I would expect to see the local memory area for the microblaze, and the memory space for the Quad SPI.

Regards

Z

 

 

 

 

 

 

 

 

 

 

          

 

 

 

[D@n]

Still sounds like a fun project.  Ever thought of posting it in Digilent's Project Vault upon completion?

Dan

[Zermelo]

Hmmm..would lovely do it, but it is an industry project...so...

[D@n]

(Sadly, this interface doesn't have a good emoticon for "rolling on the floor laughing" ...)

Dan

[Zermelo]

Yup:) But it might be harmless to post a blog with pictures of the off the shelf parts I will use and a description on how to use them. Also, a basic block diagram of the design in the Artix-7 can follow. But I'll guess I'll have to keep some tricks of the trade

Still , the BOM for that project includes components such as expensive CHIRP sonar transducers, and can reach few thousand dollars, so I would not be doing this on my own without a business interest:)