Arty diff pairs and trace lengths

[DaveM]

I would like to use the Arty, but I need more differential pairs than are available through the high speed PMOD connectors.There are other differential pairs available, but I don't know how they are routed and what the trace lengths are.  Is this information available anywhere?  As an example, JA2 and JA3 are two signals of a diff pair.  I could change R5 and R9 to zero ohms, so that is no problem.  The next question is are the traces the correct impedance?  They will be if they are on the same layer and use the same trace width as the signals to PMOD connector JB which is presumably standard 100 ohm LVDS.  If that all turns out to be true, then all I need is the trace lengths and I will be able to match them by using the correct lengths on my daughter board to make up any difference.  

So the question, is there any PCB data available that I could use to determine the answers to these questions? 

Thanks

Dave Miller

[jpeyron]

Dave Miller,

I have reached out to get the impedence for the JA pmods but that will take a few days due to vacations. Here is the trace lengths for the pmods

JA1, Signal Layers Only, 98.7322mm

JA10, Signal Layers Only, 74.8163mm   

JA2, Signal Layers Only, 88.8825mm   

JA3, Signal Layers Only, 85.8583mm   

JA4, Signal Layers Only, 84.0376mm   

JA7, Signal Layers Only, 91.9501mm   

JA8, Signal Layers Only, 81.3989mm   

JA9, Signal Layers Only, 78.4275mm   

JB1_N, Signal Layers Only, 43.4151mm   

JB1_P, Signal Layers Only, 44.8924mm   

JB2_N, Signal Layers Only, 49.3749mm   

JB2_P, Signal Layers Only, 48.0319mm   

JB3_N, Signal Layers Only, 52.81mm   

JB3_P, Signal Layers Only, 53.9883mm   

JB4_N, Signal Layers Only, 49.7562mm   

JB4_P, Signal Layers Only, 50.3673mm   

JC1_N, Signal Layers Only, 42.8432mm   

JC1_P, Signal Layers Only, 43.9615mm   

JC2_N, Signal Layers Only, 40.7409mm   

JC2_P, Signal Layers Only, 41.6723mm   

JC3_N, Signal Layers Only, 40.5492mm   

JC3_P, Signal Layers Only, 41.1834mm   

JC4_N, Signal Layers Only, 40.747mm   

JC4_P, Signal Layers Only, 41.1019mm   

JD1, Signal Layers Only, 119.5271mm   

JD10, Signal Layers Only, 97.9722mm   

JD2, Signal Layers Only, 119.307mm   

JD3, Signal Layers Only, 109.499mm   

JD4, Signal Layers Only, 107.8656mm   

JD7, Signal Layers Only, 110.1866mm   

JD8, Signal Layers Only, 124.0297mm   

JD9, Signal Layers Only, 96.4089mm   

 here is the trace length from the series resistor to the pmod

 

NetJA_1, Signal Layers Only, 5.0781mm

NetJA_10, Signal Layers Only, 2.0891mm   

NetJA_2, Signal Layers Only, 5.0615mm   

NetJA_3, Signal Layers Only, 5.0864mm   

NetJA_4, Signal Layers Only, 5.1112mm   

NetJA_7, Signal Layers Only, 2.0809mm   

NetJA_8, Signal Layers Only, 2.0974mm   

NetJA_9, Signal Layers Only, 2.0891mm   

NetJB_1, Signal Layers Only, 1.7916mm   

NetJB_10, Signal Layers Only, 2.1998mm   

NetJB_2, Signal Layers Only, 1.7668mm   

NetJB_3, Signal Layers Only, 1.7585mm   

NetJB_4, Signal Layers Only, 1.8mm   

NetJB_7, Signal Layers Only, 2.0914mm   

NetJB_8, Signal Layers Only, 2.0667mm   

NetJB_9, Signal Layers Only, 2.1583mm   

NetJC_1, Signal Layers Only, 1.8916mm   

NetJC_10, Signal Layers Only, 2.2584mm   

NetJC_2, Signal Layers Only, 1.8668mm   

NetJC_3, Signal Layers Only, 1.7585mm   

NetJC_4, Signal Layers Only, 1.8mm   

NetJC_7, Signal Layers Only, 2.25mm   

NetJC_8, Signal Layers Only, 2.2667mm   

NetJC_9, Signal Layers Only, 2.2583mm   

NetJD_1, Signal Layers Only, 5.0781mm   

NetJD_10, Signal Layers Only, 2.0607mm   

NetJD_2, Signal Layers Only, 5.0615mm   

NetJD_3, Signal Layers Only, 5.0864mm   

NetJD_4, Signal Layers Only, 5.1112mm   

NetJD_7, Signal Layers Only, 2.0809mm   

NetJD_8, Signal Layers Only, 2.0407mm   

NetJD_9, Signal Layers Only, 2.0609mm

 

so the total trace length will be adding them together.

You might also look into additional delay do to packaging in the Artix-7.  I would refer you to the Xilinx web site to get that information http://www.xilinx.com/ .  

Thank you,

Jon

  

 

[jpeyron]

Dave Miller,

I got a response back about the impedence and it is 50ohm +/-10%  and they have 200 ohm resistors in series.

thank you,

Jon

[DaveM]

Thanks.  That is what I needed

 

Dave

[DaveM]

One question --

Is the first number from the FPGA to the resistor, and the second from the resistor to the connector, or is the first number the total length from the fpga to the connector.

Thanks

 

Dave

[jpeyron]

Dave,

The first number from the FPGA to the resistor, and the second from the resistor to the connector. You will need to add the two together to get the total trace length.

thank you,

Jon 

[RedMercury]

Is the distance to the connector the distance to the through hole, or does it take into account the extra leg length for the top row of pins versus the bottom?

Im designing a connector with two differential data lanes and a differential clock lane.  Thanks!

[JColvin]

Hi @RedMercury,

I have reached back out to our layout engineer to find out this detail for you.

Thanks,
JColvin

[JColvin]

Hi @RedMercury,

I learned that those distances do not include the leg distances, so they just go to the through hole. Based on the datasheet for the female Pmod header you should be able to find out those details if you want to though.

Thanks,
JColvin

[RedMercury]

Thanks @JColvin!

I put some of the original numbers into a spreadsheet here, re-ordering the pins from alphabetical to numerical.

Some questions:

* Each pair has up to +/- 1.2mm delta, I assume this is within spec (which spec, heh) or accounted for by extra trace length in the FGPA?

* Looking at these totals, I assume that each differential pair is only length matched as a pair and not for all pairs in the high speed PMOD port?  e.g.  if I have two differential data lines clocked to my differential clock, I’ll have to add some serpentine routing to the shortest pairs.

Thanks for your awesome support(ing) an older board!