XADC Simultaneous Sampling

[Leonardo]

Hi,

Even though I think this board should be towards questions about Digilent boards specifically, see if you can help me (I tried Xilinx forums without success).

I am using the XADC's Vaux4 and Vaux12 on my Cmod A7. However, I'm having difficulties implementing the simultaneous sampling function using the XADC Wizard (Vivado 2016.2). From the wizard I get the ADC module with one address_in "pin" and one data_out "pin". My question is, if it is sampling both pairs simultaneously, how do I access the data? Wouldn't it be necessary to have two data outputs, one for each pair? How does it work? 

Thank you guys for your time and patience,
Leo

[Zermelo]

Hi,

I have not used the XADC yet (plan to do soon), but from what I read it has up to 17 input channels with a time multiplexed data out rate of 1 Msps. Therefore, the interface seems pretty clear to me. You set the "address_in" to read the buffer section dedicated to each channel, and data_out will give you the data for that channel. 

Right?

 

 

[Leonardo]

Hi Zermelo,

Yes, that is true. However, there is a mode of operation where the 16 auxiliary inputs get distributed in pairs, where each pair can be sampled simultaneously (see " Simultaneous Sampling Mode" on UG480 pg. 59). I wanted to make use of that feature, although I can't get it to work. I have the same understanding as you, as each differential pair has its own "address_in" that brings the data to the "data_out". But then this mode doesn't add extra address and data outputs, so I am wondering how it works. Perhaps it samples each input with 6bits and outputs those on the same data out register? So that is what I am trying to understand. Any thoughts?

[Zermelo]

Hi again,

First thought: Table 4-4 says that you have to set a bit in a configuration channel to select which channel pair you want to sample. My guess is that the IP gives you alternated reads in a single data register for both channels. You can try set one bit as table 4-4 says, connect two different signals (maybe phase shifted) to that pair of input channels, and perform continuous accesses to the data out register using that IP interface, see what you get. 

As said I'll play with the XADC later (possiblly this week), so I'm afraid I cannot help you much more by now. Good luck!

Zermelo