• 0
traymond

ASIC Custom libraries

Question

I heard that ASIC has a CUSTOM library.

Does Vivado Suite2016 still support these libraries?

Is there a PDF that would explain ASIC and its libraries? or is it Library?

I assume the code is still written with Verilog or VHDL?

I heard that ASIC doesnt compile, does it program somehow?

Im interested in chip approximation using ASIC what tools would I need, programmers etc?

Since Im just starting out with Vivado should I only install the basic software, I installed everything would that make learning the

menus harder etc?

 

traymond

 

Edited by traymond
worded funny

Share this post


Link to post
Share on other sites

4 answers to this question

Recommended Posts

  • 0

Hi traymond,

I looked at Xilinx's website and was only able to find this page on ASIC prototyping here where it talks about that you can prototype an ASIC on an FPGA and do some ASIC emulation on their Zynq SoC chips. Is this what you are attempting to do -- prototype an ASIC on an FPGA? 

Thanks,
JColvin

Share this post


Link to post
Share on other sites
  • 0

Well approximating older MOS CBM chips like in the C=64 8-bit computers etc.

One individual on Xilinx forum explained just what ASIC is and how the library creates what you need if a company 

provides the Libraries.  Commodore went bankrupt and so records of those gates havent been around for years, so 

youre guessing and figuring out approximately all gates, IO pins, voltages etc

The biggest problem is to possibly *maybe* create a remade IC somehow but be able to have the ability to plug that remade 

programmable IC into the 8-bit circuit but would ASIC be better because Xilinx doesnt support older 8-bit technology.

In the 80's and late 1990's CBM MOS made runs of a million ICS orr run, costing a million dollars, it would be double or triple prices to produce MOS chips in the traditional way CBM MOS made them, so uts just too costly, so FPGA using ASIC I have 

heard is the way to go.  My issue is starting simple and learning the basics of FPGA though.

I  heard that ASIC doesnt compile so how then can the gates and everything be made, so does ASIC hand this over to 

FPGA to sonehow make all gates etc in a chip?   I understand that FPGA can compile Code to the level of the FPGA and makes all that is needed.  So ASIC I assume doesnt handle the compiling, just the making of inner gates and hardware?

But to me to recreate a programmable chip with approximation you need some type of programmer, but is it a compiler is what 

I dont understand.

Granted nowadays technology has advanced past older 8-bit computers but this is a hobby 

im fond of and willing to work hard to try and recreate.

I  know of a small company that has decapped most older chips:

www.visual6502.org  but then you have to learn what each decapped circuits use is but the decapping reveals all this

and about the only way to figure out all of the CBM MOS chips.

Refreshing history, without Chuck Peddle we wouldnt of had CPU's and William Mensch and others worked together in the 

late 1960's etc.  William Mensch provides some earlier MOS chips but not what was used on later CBM 8-bit computers.

Mr Mensch cant make MOS chips but could NMOS but they arent tested that would be very expensive to test so 

not cost effective to produce.  Mr Mensch told me in an email that NMOS uses 9VDC and would only support the latter

C64C Rev-E,  C128DCR, Plus4 etc.  So the earlier C=Pet, Vic-20, C64(breadbin) these computers chips work at 

5 volts etc.

Just need to start simple but with simple FPGA projects.

traymond

 

 

 

 

 

 

Share this post


Link to post
Share on other sites
  • 0

Perhaps this link might help: EEVBlog, what is an FPGA.

An ASIC is an integrated circuit where the designer has laid out all of the internal components, transistors, capacitors, diodes, resistors, etc, to accomplish a specific task.  This is why ASIC refers to an "Application Specific Integrated Circuit."  A classic example of this would be the C64 you reference, or for that matter just about any chip within your computer.

In an FPGA, all of the internal components are wired for a different purpose: they are created as an 2D array of configurable logic.  FPGA's differ regarding what constitutes that "configurable logic" element, how many such elements they have, and how the interconnect between the logic elements works.

Where the two overlap is in the logic description: An HDL description file can be used to describe how logic should take place.  You can test this description file within an FPGA to know that it works, to test out your component, to get some initial software working, etc.  When you then decide you have the logic you want, you can then make an ASIC from it.  The ASIC you make will likely run faster--that's just the nature of custom made hardware versus repurposable, general purpose hardware.  While I've never personally made an ASIC, I've been told that a minimum cost to build an ASIC runs around $1M.  Whether true or not, it's always been out of my budget range ...  At any rate, once the ASIC has been designed (a non-trivial process), it is then sent out for manufacturing.  Upon return, the ASIC needs to be placed in a circuit board, or other test rig, and tested to make certain it works.  It is not uncommon to need to re-run the ASIC build, especially for new ASIC designs.  However, given the cost and the time involved of every ASIC run through the manufacturer, it is good engineering practice to make certain it will work before sending it to the manufacturing plant.  This, again, is where FPGA's and HDL's overlap.

The overlap can also exist during manufacturing: A good FPGA can simulate how an ASIC might work.  That simulation can be used to continue to develop a product, such as by supporting the design and testing of device drivers or software that will use that new chip.

Hopefully that helps,

Dan

Share this post


Link to post
Share on other sites
  • 0
On ‎7‎/‎29‎/‎2016 at 11:19 AM, traymond said:

Well approximating older MOS CBM chips like in the C=64 8-bit computers etc.

One individual on Xilinx forum explained just what ASIC is and how the library creates what you need if a company 

provides the Libraries.  Commodore went bankrupt and so records of those gates havent been around for years, so 

youre guessing and figuring out approximately all gates, IO pins, voltages etc

The biggest problem is to possibly *maybe* create a remade IC somehow but be able to have the ability to plug that remade 

programmable IC into the 8-bit circuit but would ASIC be better because Xilinx doesnt support older 8-bit technology.

In the 80's and late 1990's CBM MOS made runs of a million ICS orr run, costing a million dollars, it would be double or triple prices to produce MOS chips in the traditional way CBM MOS made them, so uts just too costly, so FPGA using ASIC I have 

heard is the way to go.  My issue is starting simple and learning the basics of FPGA though.

I  heard that ASIC doesnt compile so how then can the gates and everything be made, so does ASIC hand this over to 

FPGA to sonehow make all gates etc in a chip?   I understand that FPGA can compile Code to the level of the FPGA and makes all that is needed.  So ASIC I assume doesnt handle the compiling, just the making of inner gates and hardware?

But to me to recreate a programmable chip with approximation you need some type of programmer, but is it a compiler is what 

I dont understand.

Granted nowadays technology has advanced past older 8-bit computers but this is a hobby 

im fond of and willing to work hard to try and recreate.

I  know of a small company that has decapped most older chips:

www.visual6502.org  but then you have to learn what each decapped circuits use is but the decapping reveals all this

and about the only way to figure out all of the CBM MOS chips.

Refreshing history, without Chuck Peddle we wouldnt of had CPU's and William Mensch and others worked together in the 

late 1960's etc.  William Mensch provides some earlier MOS chips but not what was used on later CBM 8-bit computers.

Mr Mensch cant make MOS chips but could NMOS but they arent tested that would be very expensive to test so 

not cost effective to produce.  Mr Mensch told me in an email that NMOS uses 9VDC and would only support the latter

C64C Rev-E,  C128DCR, Plus4 etc.  So the earlier C=Pet, Vic-20, C64(breadbin) these computers chips work at 

5 volts etc.

Just need to start simple but with simple FPGA projects.

traymond

 

 

 

 

 

 

Dan, yeah 1million is out of my budget too.  Commodore MOS or CSG (Commodore Semiconductor Group) always made

a million wafers at a time, so it would cost them a Million dollars per run, probably double or triple that these days, which is why

Approximation with FPGA is the best. So ASIC seems too expensive.

I have decided to go with a different FPGA vendor since Xilinx would let me approximate CBM MOS IC's in a project board or newer circuit  but doesn't support

the older 8-bit Circuits, with the same Pinouts for the programmable chips.  I would want to try and compile into programmable chips with the DIP thru hole pins

what was used on older 8-bit computers.  There is www.visual6502.org  they do decapp older chips and have decapped a few CBM MOS chips so there would be a

guide, if one knows how to read or dechipher chip wafers that have been decapped, its awe inspiring.

The awesome SID  (Sound Interface Device) chip there is the decapped:  SID 6581R4AR  and the SID 8580R5 (I believe).

there was the SID 6582A but those are hard to find.  But the SID was a very complex little sound synthesizer chip,  its designer was Bob Yannes, at least with the

6581, Commodore MOS just changed the SID filters for the 6582A and the 8580 R5, commodore didn't know anything about Music Synthesis is why they couldn't make anymore cool changes to SID. 

The earlier 6581 used 12VDC, so it ran way hotter and the heat killed them, so CBM changed the higer voltage to 9VDC. 

 

Ahh I remembered I'm changing to Lattice one of their software in the menu has a compiler menu to support compiling actual programmable chips,

that's my issue with Xilinx they support newest circuits but not the older8 bit circuits I want to support, hopefully.

I can see Chip Approximation is no easy task, wow.

So yeah ASIC is out of the question.

There is a Forum that has been around for years:  Commodore Hacking this group discusses a lot of ASIC and MOS chips and some approximation,

there must be a way of using an older Eprom programmer to read the Pins of the chip to figure out all of the Pins, IO pins and voltages etc,  I did not know the software

for Eprom programmers would do this, but its interesting, yeah yeah its my old hobby. 

 

Thanks for your info on ASIC Western Design Center might have ASIC librairies but the main problem is that making these older MOS chips is way too expensive

for WDC, because it cost Commodore a million dollars just for building a million chips per run, double or triple that these days, which is why approximation may be the

way to recreate them.  :)

 

traymond

 

 

 

 

 

 

Share this post


Link to post
Share on other sites

Create an account or sign in to comment

You need to be a member in order to leave a comment

Create an account

Sign up for a new account in our community. It's easy!

Register a new account

Sign in

Already have an account? Sign in here.

Sign In Now