Analog signal generation and analog feedback

[ilir]

 I want to desighn signal generator sin signal in frequencies that could be changed from 100 khz to 1 mhz , and that signal to be able to multiply in voltage , curent as much low as possible 1 or 2 mA , the level of multiplication of voltage should be from 10 v to 1000 v with as low as possible output current 1 or 2 mA , From my reserch nobody produces such multiplier of voltage , so it has to be done 100 khz sin signal generator , then multiplier with big output impedance -because of low amps wanted in output , and this way i would rich to 100 v , then from 100 v to 1000 v through transformer -small ring , of 100 khz frequency to 1000 v . Does somebody has idea how to make this small analog computer in form of small part not to be bulky . Can it be done with digilent . Unbelivable nobody produces small analog computers in form of chip , that you program -in way that you get proper output , small in form of chip !

[D@n]

Wow ... those are some harsh specs.  I can't speak to the 1kV output.  I'm not sure anything done on this site will get you past 5V, and most will probably be 3V or less. I would like to try to address the sinewave signal generator portion of your question.

If you wish to generate a sine wave at 1Msps, you will need a DAC that runs at a minimum of 2Msps (Nyquist sampling), but more practically you'll need a DAC running at 2.4MHz or more--depending on the specs of the DAC and their filter cutoffs, etc.  I know Digilent sells DACs that will run at 1Msps, allowing you to create 400kHz signals.  Going for 1MHz signals might mean you have some hardware design in front of you to get a DAC working at 2.4MHz or above.  This isn't the "analog chip" you are referencing, but it does seem to be the common design these days: connect some digital logic to a DAC to produce ... whatever waveform you need.

I would personally use an FPGA to drive the digital logic--there's less chance of a glitch, such as a CPU might experience if it gets busy, and so forth.  Most FPGA's are up to the task of driving whatever DAC you are interested in--even up to 1GHz speeds and higher, although I/O gets more difficult at such speeds.  Indeed, the logic I will describe below is so simple, you might be surprised to discover a Spartan 6LX4 could handle it.

Your next step will be to build a table in block RAM within your FPGA.  This table will contain one cycle of a sine wave within it.  I typically use a 1024 element table, which is probably a good starting number.  Larger and smaller tables are doable, with consequences ...

Now, create an index into the table.  I typically use a 32-bit index, of which the top ten give me the actual table value (10 bits for a 1024 element table ...).  The bottom 22 bits give the frequency generator the ability to have 32-bit precision over the frequency the frequency generator produces.  Thus, if you are using a 2.4MHz DAC, a 32-bit index will give you frequency control with about a half a mHz of accuracy (that's milliHertz, not MegaHertz)  The last component is the step size of the index.  As with the index, this is another 32-bit value.  At each "step", you will add this 32-bit value to your index and ignore any carry--keeping only the lower 32-bits.  If you step across half the table each sample clock, you'll create a sine wave at half the sampling frequency.  If you step a quarter of the table each sample clock, you'll be creating a sine wave at a quarter of your sampling frequence, etc.  So, if you manage to get a 2.4MHz DAC hooked up, then a step value of 32'h8000_0000 will create a 1.2MHz sinewave, and a step size of 32'h6aaa_aaab will create a 1MHz sine wave, while a stepsize of (100kHz/2.4MHz*2^32) 32'haaa_aaab will yield a 100KHz sine wave.

I've seen other approaches to this method: using larger or smaller tables, more or less bits to the index and step registers, using only a quarter of a table and using sinewave properties to reflect around the table to find the value of interest, etc.  Perhaps the most interesting alternatives involve turning the table from a simeple lookup into a linear interpolation lookup, or even quadratic.  This will involve multiplies, so it gets more expensive, but your distortion also quickly goes to zero as the number of multiplies you use increases--yielding close to a perfect sine wave.  In general, a table lookup with 1024 elements will create spurs 60dB down from the primary, a linear lookup with 32 elements will keep spurs 60 dB down, and a quadratic lookup with only 16 elements will keep spurs less than 70dB lower than the sine wave of interest.

I even seem to recall an IEEE article that discussed using this method to generate a square wave, which was then used to create synthesized sound.  The square wave output would be filtered, of course, but the filter chosen would then help to yield whatever various instrumental sound the synthesizer was trying to create.

Still, it sounds like you have a fun project ahead of you.

Yours,

Dan