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Cmod A7 oscillator question


JColvin

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A customer on our website asked the following question:

Hi,

Could you please clarify what the onboard oscillator of the Cmod A7 is? The schematic shows a 100 MHz MEMS oscillator, but it's tied to the USB-12MHz line and the constraints file lists a period of 83.33 ns. The Artix 7 AC/DC data sheet also lists a minimum PLL input frequency of 19 MHz.

Thanks,

The response is below.

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Have a look at https://www.xilinx.com/support/documentation/user_guides/ug472_7Series_Clocking.pdf - you will want to use a MMCM, as the minimum input frequency for a PLL in 19Mhz.

If you use the MCM to get 100MHz you will need to multiply by 50, to get at the absolute minimum VCO frequency of 600MHz, then divide that by 6 to get a 100MHz.clock.

(see from page 38 of https://www.xilinx.com/support/documentation/data_sheets/ds181_Artix_7_Data_Sheet.pdf for the operating ranges of the MMCM and PLL).

You can also 'cheat' and use an IP  block, which will do all the calculations for you.

 

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I was able to add the ASEM1-100.000MHZ-LC-T oscillator to IC4 (backside) and removed R80 (topside) (actually kept it on the board by only letting one side be soldered). I left the 12MHz oscillator (topside) untouched. No problems with running at 100MHz. The board markings correctly identified IC4 pin 1 (the dot), and it was an easy solder job.

A very nice upgrade for the cmod A7.

The 100MHz oscillator input to the A7 is the same pin as the 12MHz. Removing R80 means that the 12MHz oscillator is not connected any more.

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On 11/3/2018 at 3:17 PM, amkichu said:

But whenever I try to implement with a clocking wizard for any project, I will get a negative slack with 1 critical warning. Please find the screenshot. Is there any fix?

 

Hello amkichu, I know it has been a long time between my comment and your previous questions. I recently fixed these issues with a friend of mine when we did a few changes:

 

1) Make sure you Input buffer your clock from the FPGA or the sys_clk_pin. This would look like:  IBUFG inputClkInst(.I(FPGA_CLK),.O(clkFPGA_bufd));

2) If you have multiple clocking wizards, feed in the previous output clock through a normal buffer like this:  BUFG bufg_300MHz(.I(clk_300MHz),.O(clk300_bufd)); 

Then you can bring in the bufd clock as the input into your other clocking wizard. (Make sure to specify the correct frequency on it in the wizard)

3) If you use the clocks from the IP Clocking Wizard, make sure to buffer them before sending them to other modules to drive the signals there. 

 

Hope this helps!

Cheers!

 

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Hi,

could you maybe "open the implemented design" and check the timing reports?

With your screenshot, this is a blind guess: One fairly popular mistake is to define a clock twice, once in the constraints file, once via the MMCM IP block. In this case, you get "inter-clock" failures ("from one clock to the other") between two clocks with different names that are in reality the same. A solution may be to disable the clock definition from the constraints file, keep the one from the clock wizard.

If you want to debug it yourself: Look at the clocks in the timing report and try to explain what every one of them means. If there are some that don't make any sense, this may be the culprit.

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On 7/14/2016 at 12:22 AM, jpeyron said:

Hi Jw,

If you wanted to add a 100MHz oscillator to IC4 you can. If you did you would need to remove R80 as you suggested.  You are correct with using the MMCM of the Artix which does support frequencies as low as 10 MHz. Let us know if there is anything else we can help you with.

thank you,

Jon

But whenever I try to implement with a clocking wizard for any project, I will get a negative slack with 1 critical warning. Please find the screenshot. Is there any fix?

image.thumb.png.cb99ea77334bd4a1b4fbd43cc87d7208.png

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Hi,

On the first page on the clocking Wizard IP config, switch to "MMCM" mode. That will accept 12 M input frequency.

E.g. "Project manager" window, "IP catalog", search for "clock", double-click "clocking wizard", then set "Primitive" on the first page to "MMCM" instead of "PLL".

Unfortunately, my quota is exhausted, otherwise there would be a screenshot :)

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On 27/5/2017 at 9:19 AM, hamster said:

Have a look at https://www.xilinx.com/support/documentation/user_guides/ug472_7Series_Clocking.pdf - you will want to use a MMCM, as the minimum input frequency for a PLL in 19Mhz.

If you use the MCM to get 100MHz you will need to multiply by 50, to get at the absolute minimum VCO frequency of 600MHz, then divide that by 6 to get a 100MHz.clock.

(see from page 38 of https://www.xilinx.com/support/documentation/data_sheets/ds181_Artix_7_Data_Sheet.pdf for the operating ranges of the MMCM and PLL).

You can also 'cheat' and use an IP  block, which will do all the calculations for you.

 

But if the original clock is 12 MHz we are below the PLL spec then how this can work? May be I've forgotten somethings? Could yuo please let me know more about this point?

Thanks

Best regards

Grinch

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On 26/5/2017 at 9:35 PM, Alex said:

Hi, after consulting with @sbobrowiczadding an additional oscillator is not recommended, because:

-       You can achieve the desired frequency using the existing oscillator, as mentioned in the reference manual.

-       Removing R80 is not feasible.

-       The chapter “5 Oscillators/Clocks” of the reference manual has the details

 

Could you please a link to this manual in order to get the info on this subject?

Thanks!

Grinch

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For the benefit of other users, I will just point out that I have already successfully put in a 100 MHz oscillator on more than 20 pieces of CMOD-A7  (with a failure on one piece).  

Removing R80 with a soldering iron is quite trivial.

Soldering in a new oscillator chip into IC8 is slightly tricky.

If the 100 MHz clock can be generated internally using Artix7's clock resources, then I would agree with Alex this is a better solution however. Could you more specific about which reference manual you are referring to? Certainly the CMOD-A7 manual has no information on this that I can find. 

 

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Hi, after consulting with @sbobrowiczadding an additional oscillator is not recommended, because:

-       You can achieve the desired frequency using the existing oscillator, as mentioned in the reference manual.

-       Removing R80 is not feasible.

-       The chapter “5 Oscillators/Clocks” of the reference manual has the details

 

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Hi,

I am attempting to do this (put a 100 MHz oscillator (ASEM1-100.000MHZ-LC-T) in at IC4 and removed R80), but I am unable to determine to location of R80 as it does not appear to be labeled on the silkscreen. Could a moderator with access to the hardware schematics indicate the physical location of R80?

Thanks,

Kyle

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Hi Jw,

If you wanted to add a 100MHz oscillator to IC4 you can. If you did you would need to remove R80 as you suggested.  You are correct with using the MMCM of the Artix which does support frequencies as low as 10 MHz. Let us know if there is anything else we can help you with.

thank you,

Jon

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Hi Bianca,

Board's still in the mail, but - I do indeed see on the store photos that IC4 is populated and IC8 is not. If I were to need the 100 MHz clock, R80 should be removed so as not to draw excessive current from either oscillator, right?

I see the MMCM of the Artix supports frequencies as low as 10 MHz, so I should be able to use that instead.

Thanks,

Jw

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Hello,

Actually the CMOD A7 has two oscillators a 12MHz and a 100MHz. If you look in the schematic, there is a black page. There is the 12MHz clock but we cannot release that page. You can find it on your board listed as IC8. The 100MHz clock is GCLK that goes to the bank 14 of the FPGA and is used for applications requiring a very fast signal connection.

Regards,

Bianca

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