Digital Discovery Pattern Generator with external trigger to start the pattern output

[Hakon]

Hi,

I'm using the Waveform SDK with Python and I'm not able to get the DD to start the pattern output with a digital input as trigger.
I have tried to look into the different examples in the SDK, but none of them seem to fit this exact use case.
 

Use case:

Preparation:
Generate a pattern

Run time:
Get a rising edge on a specified I/O pin (e.g. DIO-25)
Wait an amount of time using FDwfDigitalOutWaitSet
Play pattern on a specified I/O pin (e.g. DIO-24)

Do you have a code snippet which fits this use case?

 

Best, Hakon. 

Edited January 4, 2022 by Hakon

[attila]

Hi @Hakon

It may be better to start the analog-in to reset the trigger detector... dd.py
dwf.FDwfDigitalInConfigure(hdwf, c_int(1), c_int(1))

I see ~10ns jitter due to the 100MHz system frequency and about 200ns latency, 202-211ns for 10ns wait.

[attila]

Hi @Hakon

See: dd2.py

[attila]

Hi @Hakon

The following script is run on Digital Discovery generates pattern on DIO-24 and captured by Analog Discovery DIO-0 dd.py
Trigger is generated by AD on DIO-1 connected to DD DIO-25

 

[Hakon]

Hi @attila

I'm impressed with how quickly you were able to answer and deliver a working example! :) 

 

I need to play back the pattern using 100 MHz frequency. I'm observing jitter when the pattern in played back. 

I modified the example snippet to use 100 MHz playback, and wait 1 us.

In the two screen shots below you can clearly see the difference. 1.2092 us vs 1.0259 us, approx 200 ns difference.
Using one DD through Python SDK, and another through waveform 3.17.21

Are there some methods to reduce this jittering?
 

 

 

Edited January 5, 2022 by Hakon

[Hakon]

Hi @attila,

 

After some manual testing I see around 10 ns jitter on my end as well.
Around 200 ns delay. 
Thanks for providing the examples! I really appreciates this! ?

 

Another question related to the triggering;
Is it possible to use the DIO25 as a digital output instead of input, and the pattern generator is triggered (with wait stage as before) when the digital output is set high?

 

[attila]

Hi @Hakon

Do I understand correctly that you want use DIO-25 as input to trigger on this and when triggered to change it to be output ?
If so: 
output2 = 1 # DIO-1 or DIO-25 for DD
dwf.FDwfDigitalOutEnableSet(hdwf, c_int(output2), c_int(1))
dwf.FDwfDigitalOutIdleSet(hdwf, c_int(output2), DwfDigitalOutIdleZet) # high impedance/input when not running 
...

[Hakon]

Hi @attila

I must have been unclear. 
In this scenario using DIO-25 only as output, and the pattern generator is triggered on the rising edge of DIO-25.

I can see two alternatives here, and wonder what you would recommend.

1. Use the pattern generator as in the code snippets already and trigger on the rising edge on DIO-25 (when DIO-25 is a digital output pin).
2. Use both DIO-pins for the pattern output, and create a longer pattern which embeds the wait stage (I guess there is a limit on how long a pattern sequence can be, so not sure this will work). Use case requires around 50 us delay from rising edge trigger until pattern is played back. 

 

[attila]

Hi @Hakon

What are the requirements for DIO-25 ? How long does it needs to be ?
If both DIO-24/25 are controlled from the same device it will have no jitter.

[Hakon]

Hi @attila 

The DIO-25 needs to be on for a "long time", meaning idle to high after the pattern in generated. 
 

Sequence will be similar to this

1. Set DIO-25 low
2. Reconfigure DD to use pattern
3. Do other stuff 
4. Start pattern playback
5. Playback done
6. Idle with DIO-25 high, and DIO-24 low.

[Hakon]

Hi @attila

Thanks for your help!

The code examples are brilliant, and spot on for my use cases. 

The jitter is below ~2 ns in the latter example where the DD drives an output IO is within my margin.