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XADC problem on ARTY A7 100T


wolfgang6444

Question

Hello, I am new to the ARTY A7 and am trying to use the XADC (e.g. Vaux0p/n).

I manage to read Vp/Vn, but I cannot read out Vaux0p/n.

What I have done:

 

I instantiate XADC-wizard in vivado 2021.1 and configured it to sequence Vp/Vn and vauxp0/vauxn0.

I am using the attached constraint-file.

When I upload the generated bit-stream, I can select all of the XADC-inputs in the System Monitor.

If I apply 0.4V to pin V_p and 0V to pin v_n on J7, I get a reading of 0.4V for VP_VN.

If I apply 0.4V to pin A0 and 0V to pin A1 on J1 I get 0V for Vaux_p0-Vaux_p1.

What could be wrong? And why can I select any input in the System Monitor, while I configured to only scan vp/vn and vauxp/vauxn0?

 

Many thanks,

Wolfgangadc_master_xdc.xdc

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Hi @wolfgang6444and @engi

The A0/A1 pins are connected to XADC channels 4 and 5 rather than channels 0 and 1 (edited). The mapping between the XADC channels and the arduino header pins can be seen in the master XDC file on github (here is line 120 of the 100T XDC). You can also see the mapping in the board's XADC demo: https://digilent.com/reference/programmable-logic/arty-a7/demos/xadc. You ought to be able to confirm this is the case with your current design by taking a measurement through the A5 pin, which is connected to aux channel 0.

I'm looking into getting this clarification added to the reference manual.

Thanks,

Arthur

Edited by artvvb
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