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PmodCAN: AXI Address Space

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I am currently working with the PmodCAN module and I am trying to make it work inside a bigger design with other AXI IPs. Unfortunately I can not find any documentation about the PmodCAN Vivado IP and the AXI address space. So I have some questions:

1. It is not clear to me, what the use case  of the `AXI_LITE_GPIO` interface is. From what I can see, the PMOD interface is pre-defined to be used for the SPI communication with the MCP25625 IC; other SPI PMODS doesn't seem to need it either. I have the suspicion that some of the MCP25625 Pins can be configured as GPIOs in some way, but anything I thought would make sense, does not match with your provided C code examples. Which brings me to my second question.


2. Is there any documentation about the AXI address space and how to use it to configure, send and receive messages? I am currently trying to understand how the IP works by looking at the signals and the VHDL code. Unfortunately this approach is very time consuming and I could get things done much faster, if there is any documentation about the address space. Maybe I am just overlooking something here.

To summarize, I would like to ask, if the intention behind the Vivado IP was primarily for demo purposes to use it from C code or not; should I rather implement my own IP to let it directly communicate with other AXI IPs? 

Edited by Nico89
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Hi @Nico89

The Pmod CAN IP encapsulates Xilinx's AXI QSPI IP and AXI GPIO IPs (looks like versions 3.2 and 2.0, respectively, in the latest vivado-library release). Each of it's AXI interfaces connects to these and provides direct access to one of these IP's register spaces. The AXI GPIO is connected to the bottom row of the Pmod connector, to provide software interrupts and the ability to trigger a reset. The Pmod IP is intended to be used through C code and the software drivers provided with the IP - the drivers for the encapsulated Xilinx IP are wrapped by an additional software layer for the CAN.

Hope this helps,



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