• 0

Trouble flashing into QSPI of ARTY Z7-20


Question

Hello,
I am new to FPGAs. Recently I bought a ARTY Z7. I wrote basic verilog code and programmed it it worked fine. Then i wanted to use the QSPI to flash the board so that the configuration gets loaded after poweroff. I tried a lot debugging why it was not working but i have no clue. I also went through lot of similar forum posts and i tried most of them but didnt work yet for me.

These are the things i did in short.

  • the program device is working properly only i am having trouble with the flashing QSPI
  • I kept the jumper in JTAG position
  • I have taken Zynq Processing System IP into the design along with the the HDL module and created a HDL wrapper 
  • I made fsbl applicatin project in sdk and created the boot image
  • I checked the USB drivers they were ok
  • I was getting this error when i was trying to flash the fpga 
Quote

****** Xilinx Program Flash
****** Program Flash v2019.1 (64-bit)
  **** SW Build 2552052 on Fri May 24 14:49:42 MDT 2019
    ** Copyright 1986-2019 Xilinx, Inc. All Rights Reserved.


Connected to hw_server @ TCP:127.0.0.1:3121
Available targets and devices:
Target 0 : jsn-Arty Z7-003017B2FF53A
    Device 0: jsn-Arty Z7-003017B2FF53A-4ba00477-0

Retrieving Flash info...

Initialization done, programming the memory
===== mrd->addr=0xF800025C, data=0x00000000 =====
BOOT_MODE REG = 0x00000000
Downloading FSBL...
Running FSBL...
Finished running FSBL.
===== mrd->addr=0xF8000110, data=0x000FA220 =====
READ: ARM_PLL_CFG (0xF8000110) = 0x000FA220
===== mrd->addr=0xF8000100, data=0x00028008 =====
READ: ARM_PLL_CTRL (0xF8000100) = 0x00028008
===== mrd->addr=0xF8000120, data=0x1F000200 =====
READ: ARM_CLK_CTRL (0xF8000120) = 0x1F000200
===== mrd->addr=0xF8000118, data=0x000FA240 =====
READ: IO_PLL_CFG (0xF8000118) = 0x000FA240
===== mrd->addr=0xF8000108, data=0x00030008 =====
READ: IO_PLL_CTRL (0xF8000108) = 0x00030008
Info:  Remapping 256KB of on-chip-memory RAM memory to 0xFFFC0000.
===== mrd->addr=0xF8000008, data=0x00000000 =====
===== mwr->addr=0xF8000008, data=0x0000DF0D =====
MASKWRITE: addr=0xF8000008, mask=0x0000FFFF, newData=0x0000DF0D
===== mwr->addr=0xF8000910, data=0x000001FF =====
===== mrd->addr=0xF8000004, data=0x00000000 =====
===== mwr->addr=0xF8000004, data=0x0000767B =====
MASKWRITE: addr=0xF8000004, mask=0x0000FFFF, newData=0x0000767B
Problem in running uboot
Flash programming initialization failed.

ERROR: Flash Operation Failed

Looking forward for any help and suggessions,

Thanks a lot.

Link to post
Share on other sites

4 answers to this question

Recommended Posts

  • 0

Hi @sayansree paria,

What version of Vivado and SDK/Vitis are you using?

In Vitis you have the option during initial project creation to check a box labeled "Generate Boot Components", which does the FSBL portion for you. You can then go to the Xilinx tab -> Program Flash and select the BOOT.BIN that is available in ../<project-location>/<project-name>_system/Debug/sd_card.

The .elf for the FSBL should be pre-filled in, but will otherwise be located at ../<project-location>/<design-name>_wrapper/export/<design-name>_wrapper/sw/<design-name>_wrapper/boot/fsbl.elf

Let me know if you have any questions.

Thanks,
JColvin

Link to post
Share on other sites
  • 0

Hi @sayansree paria,

I'll need to debug this some more in 2019.1. The output you have can sometimes be resolved by disconnecting and then reconnecting board, though when I attempted to follow the same flow of creating an FSBL and a .bin (as outlined in this Xilinx document, https://www.xilinx.com/html_docs/xilinx2019_1/SDK_Doc/SDK_tasks/task_creatingabootimage.html, which based on what you described you already followed), SDK reports to me that the flash was successfully programmed, but when I then attempt to boot up from QSPI, the program was not loaded.

Thanks,
JColvin

Link to post
Share on other sites
  • 0

hello @JColvin

12 hours ago, JColvin said:

SDK reports to me that the flash was successfully programmed, but when I then attempt to boot up from QSPI, the program was not loaded.

I tried many things after that couldnt get to make the custom RTL verilog module work. I then thought of trying to flash a simple hello world sketch, I followed similar steps added IP blocks needed created a wrapper, generated bitstream, exported hardware, went to SDK. Build example hello world application and tested with Launch on Hardware (which worked as expected).

Then created a boot image using fsbl and this application. this time luckily there was no errors flashing it said Flash Operation Successful but when i switched over to QSPI and powered it on, the program was not loaded. similar to your observations.

If you come up with any solution to this please let me know.

thanks a lot for your time

Link to post
Share on other sites

Create an account or sign in to comment

You need to be a member in order to leave a comment

Create an account

Sign up for a new account in our community. It's easy!

Register a new account

Sign in

Already have an account? Sign in here.

Sign In Now