As I can see, the basys 3 locked Vivaldo license allows for the use of the ILA (Integrated Logic Analyzer) IP core; artix 7 also shows as a supported fpga family on

Looking over Xilinx's ILA documentation ( resource utilization section, it seems the ILA uses quite a bit of logic fabric (though the data is from a Kintex 7 fpga and I don't know how big the resource usage difference is between this family and the artix 7).

Have any of you successfully used the ILA with the basys 3, and if so, how much of the fpga was occupied by it?

Thank you


Edited by andrei

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Hi andrei,

These are the results I am able to get on the Basys 3. The ILA is set up with 64 probe ports and a data depth of 1024.

  • LUTs - 2694 of 20800
  • LUTRAM - 476 of 9600
  • Flip-Flops - 4126 of 41600
  • Block RAM - 6 of 50

Overall just under 20% of the FPGA fabric is used by the ILA.



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