Jump to content
  • 0

Real-time high-speed data acquisition with Eclypse Z7 and Zmod ADC 1410


kaveh

Question

Hi 

I wonder how is it possible to fill the 1Gb of DDR memory at Zynq 7000 with the samples captured from ZMOD ADC 1410 at 100 MSa/sec. I read the documentation of ZMODadc14110axi and find that the module use a circular buffer which can't be read and write at the same time. However, my inclination is that for real-time signal processing the buffer should be able to read and write at the same time. Or, you have ping pong buffer that one is reading while the other one is writing. Also, another question is that the data processing speed is faster than data acquisition speed? I mean the time it takes for data to be transformed from circular buffer to axi stream and from axi stream to DDR memory. Does it take faster than the 100 MSa/sec of ADC data acquisition? 

Thanks

Kaveh

Link to comment
Share on other sites

1 answer to this question

Recommended Posts

  • 0
39 minutes ago, kaveh said:

I wonder how is it possible to fill the 1Gb of DDR memory at Zynq 7000 with the samples captured from ZMOD ADC 1410 at 100 MSa/sec.

I assume that you mean a contiguous stream of ADC data samples. There's not a lot of processing that you are going to do on those samples with a Z7020 ZYNQ on the fly as data is being captured.

If you look around on other areas of this site you can see how to capture 128 M samples of 4 ADC channels into DDR memory that can be processed on a PC later, using 2 ZMODs and a non-ZYNQ platform.

The Digilent AXI IP isn't high performance or even good at demonstrating what a Z7020 and SYZYGY is capable of and I don't expect to see anything better. Is it possible to use AXI to DMA huge quantities of contiguous 100 MHz data into the PS external DDR if the PS is running code out of internal RAM? I don't know. I've done this for 143 MHz 64-bit data, about 1100 MB/s, for a total of 128 KB of sample data using Xilinx's Virtual FIFO IP on the Eclypse-Z7; but that's the limit of the IP. If you were to write you own AXI IP perhaps you can do better.

If the Eclypse-Z7 were to have DDR memory connected to the PL that would be a much different matter and make the platform interesting. Using a ZYNQ PS to store data from the PL just isn't that useful for a wide range real-time DSP applications. It certainly can be for a few embedded applications.

I'm not sure where you are headed with your post so I'll stop now.

Link to comment
Share on other sites

Create an account or sign in to comment

You need to be a member in order to leave a comment

Create an account

Sign up for a new account in our community. It's easy!

Register a new account

Sign in

Already have an account? Sign in here.

Sign In Now
×
×
  • Create New...