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USB104-A7 [DRC RTRES-1] Backbone resources Error


rmccormack1

Question

So I have a block design that I have created. I go through the synthesis and implementation and I get no errors. When it comes time to generate bitstream, I get this error: [DRC RTRES-1] Backbone resources: 1 net(s) have CLOCK_DEDICATED_ROUTE set to BACKBONE but do not use backbone resources. The problem net(s) are design_1_i/clk_wiz_1/inst/clk_out2. I want to know why I am getting this error?

block design microblaze.png

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