Signal Generation - DDS Compiler, CORDIC, PL, PS - Comparison

[3rdClassLidlToaster]

Hi,

I had two questions concerning Signal generation with Zynq SoC or FPGA.

As far as i know there would be four methods to realize a signal generator:

Using DDS compiler IP; Using CORDIC IP; Make own implementation in Micorcontroller Part of SoC; Make own implementation in PL Part or FPGA

1) Are these all possibilities for Implementation or i forgot one ?

2) What are the advantages and disadvantages comparing these possibilities ?

Greetings

[dpaul]

You are not specific regarding the type of "implementation " you mean here - Make own implementation in Micorcontroller Part of SoC; Make own implementation in PL Part or FPGA

1. Signal gen can also be done using look-up tables. Depending on the nature of signal to be generated, the "look-up" table method is supposed to be efficient. The savings in processing time can be significant, because retrieving a value from memory (where loop-up table values are stored) is often faster than carrying out an "expensive" computation or input/output operation.

2. That is your homework, search out and compare!