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Eclypse Z7 libraries & Vivado 2020.2 (or any later version) for a measurement platform


Joe_01

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Dear forum members,

I tried to get into the Eclypse environment, with at least partial success. I am using the newest Vivado + Vitis version (2020.2) and I could go through the very basic tutorials, even though the IP integration tutorial did not work out in the final steps.

Now I try to find out since some days how to get access to all the board file libraries or some demo projects to use the existing environments and reprogram the device to my needs, however even after going through the Zmod lib, and dedicated ADC/DAC tutorials I do not really manage to find the necessary files (or I am simply confused in the directories). In the "git repositories" tutorial it says that the demos are only compatible with 2019.1, is it now somehow possible to still work on it with 2020.2? Or do I need to the old version to get everything running? If there is an updated tutorial that would be also very helpful :)

I am basically trying to build up such an infrastructure:

image.thumb.png.08444dbb288902fc9556c2dee779401f.png

as a measuring platform for my PhD project. If there are similar projects that might help I would be very happy about it :)

 

Many thanks,

Johannes

 

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Hi @Joe_01,

I've asked another engineer to take a look at this. They let me know that should be fairly straightforward to upgrade a baremetal design to a newer version (provided dma stuff hasn't changed drastically) but we've been wrong before. They probably won't get the opportunity to test this out until next week though.

Thanks
JColvin

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Hi @Joe_01

I've attached ZIP files with 2020.2 projects for the baremetal demos for the Zmod ADC and Zmod DAC, and the vivado project supporting both of them. Note, I have not tested this in hardware.

You can also take a look at an updated version of the IPI getting started guide written for 2020.1 (there should be only minimal differences): https://reference.digilentinc.com/programmable-logic/guides/getting-started-with-ipi

Thanks,

Arthur

vitis_export_archive.ide.zip hw.xpr.zip

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Hi JColvin,

Thank you for your answer! By now I managed to get the communication to the ZMods runnings thanks to the great tutorials here: https://www.hackster.io/whitney-knitter/hello-zmods-on-the-eclypse-z7-99107d. At least I start to get into the overall structure :)

Now I try to figure out how to integrate PMOD's. I'd like to use the two PMOD ports as generic IO's (I will use them to control external components) and I'd like to change the IO's from the C environment in Vitis (which again will be configured via Python from the PC). Is there maybe a good introduction on how I can control the PMOD IO's in Vitis, or which of the example projects can I use as a guideline?

Thanks a lot!

Johannes

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Hi @Joe_01,

The guide you linked touches on how to integrate and use Pmods in a Vitis application, but Digilent has a more specific guide available here: https://reference.digilentinc.com/programmable-logic/guides/hierarchical-blocks. The Pmod IPs come with examples that show how to use them.

If you're looking for a more generic approach to using the Pmod ports (and not using an actual Pmod), you could either follow the flow above and take advantage of the existing library framework for whatever protocol you might be wanting to use (SPI, I2C, UART, GPIO) and then wire whatever piece of external hardware to the port, or you could follow along with this guide, https://reference.digilentinc.com/programmable-logic/guides/getting-started-with-ipi, and manually constrain the AXI_GPIO block outputs to Pmod port pins in the .xdc file.

Let me know if you have any questions about this.

Thanks,
JColvin

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I am using a Vivado 2021.2 license.

1. Can you make a Linux and Baremetal version for that Revision available as well?

2. When I run the Python script the .xpr file created does not contain any IPs. Is this supposed to be normal. What is the xpr file supposed to provide.

3. I have in the interim begun assembling my own design. Will it fail at compile time because of the Revision incompatibility?

UM

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Digilent hasn't gone through the process of updating and validating any of our projects in 2021.2 at this time.

When running git_vivado.py in a version of the tools other than the version that the project was checked in with, it is expected that the block design would not be recreated.  The Vivado project, represented on disk by the XPR file, once fully checked out will contain a block design including the Zynq PS, DMAs, and Zmod IP, configured so that they can be used to capture data.

If you'd like to use the projects in a later version of Vivado than the one that they were created for, rather than using the git scripts, you can potentially work with a project ZIP archive. Vivado projects can be opened in higher-numbered versions as long as you have the project archive, so you can download the 2020.2 project I provided above, open it in 2021.2, and potentially upgrade any Xilinx IP that might have changed through Report IP Status. This isn't 100% guaranteed, because Xilinx IP and underlying properties of the tools can differ between versions, however, it would be a start. Unfortunately this won't include support for the Linux projects.

The same goes for importing Vitis projects exported in a different version, though I'm less sure here.

Thanks,

Arthur

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On 5/18/2021 at 9:42 AM, Joe_01 said:

Thank you for your answer! By now I managed to get the communication to the ZMods runnings thanks to the great tutorials here: https://www.hackster.io/whitney-knitter/hello-zmods-on-the-eclypse-z7-99107d. At least I start to get into the overall structure :)

Hello Joe, sorry if I open this post again after lot of time. Did you manage to go into the all process without errors? Actually I'm stuck with a makefile error in combination with "ELF file does not exist".

Does anyone know how to solve it?

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