Daniel Carrasco Posted April 8, 2021 Share Posted April 8, 2021 Good afternoon. We have several JTAG_SMT2-NC modules on some identical cards. We have observed an anormal behaviour on GPIO2 pin. This pin are connected to PS_SRST_B pin of a Xilinx Zynq FPGA. In good cards, when the card are power on, GPIO2 signal goes to high (3,3V) level. So the Zynq is not reset. In some "bad" cards, GPIO2 signal goes to low level when the card are powered on. It could be a JTAG_SMT2-NC FW or version issue? Could I check JTAG_SMT2-NC version via current USB connection? If not, could I send you JTAG_SMT2-NC serial number or address in order to get FW version. Best regards, D. Carrasco Link to comment Share on other sites More sharing options...
0 JColvin Posted April 9, 2021 Share Posted April 9, 2021 Hi @Daniel Carrasco, Hmm. There isn't any firmware as such in the JTAG SMT2-NC (or any of the Digilent JTAG products). I'm surprised to hear that on power-up the GPIO2 signal goes low because all of the GPIO pins on the JTAG SMT2-NC have an integrated pull-up resistor to ensure that the GPIO signals are not floating while be not being actively driven, as the case would be on power-up as Xilinx tools would not have control of the module immediately upon power-up: https://reference.digilentinc.com/reference/programmers/jtag-smt2-nc/reference-manual#gpio_pins. After Xilinx takes control of the device and enables DPIO port 0 With this, what I would be checking on your cards would be those pull-up resistors (R4 for this particular pin) and other sources to see what might be bringing this pin to a low state upon initial power up. Thanks, JColvin Link to comment Share on other sites More sharing options...
0 Daniel Carrasco Posted April 13, 2021 Author Share Posted April 13, 2021 (edited) Hi @JColvin I have meassure R4 resistor: 99K5. It is some weak pull-up, no? I am not sure I meassure the correct one. Silk layer are confusing. Could you send me a location component drawing? I send a photo marking the meassure. I suspect the issue could be a hardware version. It could be so? If so, I wanted to find a way to get HW version without component disoldering. It would be possible to check any data using USB connection (EEPROM values, or so on)? Best regard, D. Carrasco Edited April 19, 2021 by Daniel Carrasco Mention fix Link to comment Share on other sites More sharing options...
0 Daniel Carrasco Posted April 13, 2021 Author Share Posted April 13, 2021 (edited) Hi @JColvin, I send an update. We have received one remaining JTAG-SMT2-NC component of the batch we used for card assembly. This is PB200-308 rev A So, if seems to be the first revision. I have done some research on the web. There are manuals for JTAG-SMT2 model from revision A thru D. How many revisions are for JTAG-SMT2-NC model? Could be a hardware issue in JTAG-SMT2-NC rev A? Best regards, D. Carrasco Edited April 19, 2021 by Daniel Carrasco Mention added Link to comment Share on other sites More sharing options...
0 JColvin Posted April 20, 2021 Share Posted April 20, 2021 Hi @Daniel Carrasco, I apologize for the delay. There is only one hardware version of the JTAG-SMT2-NC and that is the revision A that you have. The JTAG-SMT2 (not NC) does have multiple revisions, but the -NC version is based off last revision of the JTAG-SMT2 which ensured correct power up states on GPIO pins through hardware design. I can confirm you located the correct resistor. I do not know why multiple modules are having their GPIO2 lines going to an active low state upon power up. What I would be checking at this point would be to see if the other GPIO and JTAG lines are also set in an active low state upon power up to help determine the root issue. Were the bad cards working correctly before and have no stopped working or have they always been this way? Thanks, JColvin Link to comment Share on other sites More sharing options...
0 Daniel Carrasco Posted April 20, 2021 Author Share Posted April 20, 2021 Hi @JColvin. I have tested all these on a "bad" board. Digilent module shows GPIO2 (PS_SRST_B) and GPIO1 at low level (about 30mV). But GPIO2 shows high level (3.3V). TDO,TDI, TMS, TCK and Vref pins are also at 3.3V level. Then, I connect digilent module JTAG to a PC. Nothing changes. But, when I started Vivado Hardware Manager, open Digilent and begin to scan the JTAG chain, then GPIO2 (PS_SRST_B) changes to low level. GPIO1 remains at low level, and GPIO2 stands on high level, too. I observed this behaviour on new cards. So this is the first poweron of a new digilent module. I don't think it could be a failure of a good module. I also compared R4 resistors of a "good" and "bad" Digilent module. Both meassure 99K5 Best regards, D. Carrasco Link to comment Share on other sites More sharing options...
0 JColvin Posted April 21, 2021 Share Posted April 21, 2021 Hi @Daniel Carrasco, I am a bit confused. You stated two different times that the GPIO2 (PS_SRST_B) are at logic low levels (30 mV), but then say that GPIO2 is found to be at logic high level (3.3 V)? Which voltage value is found on GPIO2 (pin 7 on the JTAG SMT2-NC module)? Thanks, JColvin Link to comment Share on other sites More sharing options...
0 Daniel Carrasco Posted April 21, 2021 Author Share Posted April 21, 2021 Hi @JColvin, I described 3 stages on a "bad" board behaviour: First, I poweron the card, with Digilent adapter USB unconnected from PC. GPIO2 shows low (38mV). Second. I connect Digilent USB to a PC. GPIO2 remains low (38mV). Third. I launch Vivado Hardware manager. Open Digilent adapter and start JTAG scanning. Then GPIO changes to high level (3.338V) Best regards, D. Carrasco Link to comment Share on other sites More sharing options...
0 JColvin Posted April 26, 2021 Share Posted April 26, 2021 Hi @Daniel Carrasco, I asked our design engineer who made the SMT2 modules and they asked if you have an external load or a pulldown on the GPIO lines? Or can you provide some schematics showing how you have the JTAG SMT2-NC connected to the rest of your system? Thanks, JColvin Link to comment Share on other sites More sharing options...
0 Daniel Carrasco Posted April 27, 2021 Author Share Posted April 27, 2021 Hi, @JColvin Sure. I send you a schematic page which shows digilent connection. This module is connected directly to a buffer and a backplane conector. The buffer distributes several copies of TMS, TCK, T_RST signals, and protect FPGA circuitry. JTAG signals are routed to two FPGAs (Zynq and Virtex US+) and 3 mezzanine cards connectors, but it is done on the opposite side of the buffer There is not any pull-up between Digilent module and the buffer on any GPIO lines. Only GPIO2 is used (to perform TRST signal). When this signal reachs Zynq FPGA, there is a pull-up resistor. The other GPIO are unconnected (floating) Best regards, D. Carrasco Link to comment Share on other sites More sharing options...
0 JColvin Posted April 27, 2021 Share Posted April 27, 2021 Hi @Daniel Carrasco, I have reached out to the design engineer for their feedback on this. A clarification question that I had is where were you measuring the GPIO2 voltage? I'm presuming on the pin 7 directly on the JTAG SMT2-NC module itself? Thank you, JColvin Link to comment Share on other sites More sharing options...
0 malexander Posted April 27, 2021 Share Posted April 27, 2021 @Daniel Carrasco It sounds to me like R4 may be cold soldered on some of the modules (may have happened during the reflow process when mounting SMT2). If I were debugging this I would try soldering a 10K ohm resistor between DIG_TRST and 3V3 on one of the boards that was measuring ~30mV after power up and repeat the DIG_TRST voltage measurements. If it measures closer to 3.3V than 30mV prior to opening the device in Vivado then R4 is likely cold soldered. Please try this experiment and report back your findings. Thanks, Michael Link to comment Share on other sites More sharing options...
0 Daniel Carrasco Posted May 6, 2021 Author Share Posted May 6, 2021 Hi @malexander, @JColvin I have tried the propposed experiment. I soldered a 10K resistor between DIG_TRST and 3.3V. The result were the same. This signals start at 0V level when the card is swithed on. It also changes to 3.3V when I run Hardware Manager and connect to digilent Best regards, D. Carrasco Link to comment Share on other sites More sharing options...
0 malexander Posted May 6, 2021 Share Posted May 6, 2021 @Daniel Carrasco By default the level translator that drives the GPIO2 pin should be configured as an input, meaning it should appear as high-z and allow GPIO2 to be pulled or driven by another source. Can you please measure the voltage of the direction net after power on (before opening the device in Hardware Manager) and report back? I've attached an image that shows where to perform the measurement. Thanks, Michael Link to comment Share on other sites More sharing options...
0 Daniel Carrasco Posted May 7, 2021 Author Share Posted May 7, 2021 Hi @malexander, I meassure that point referenced to GND. It shows 2.289V when HW manager is not connected. Then, if I connect USB cable and open digilent in HW manager, the voltage do not change at all. Best regards, D. Carrasco Link to comment Share on other sites More sharing options...
0 malexander Posted May 7, 2021 Share Posted May 7, 2021 @Daniel Carrasco That's not good because it means that the DIR pin of the level translator sees a logic '1' when it should be receiving a '0' when the module isn't open in the Xilinx tools. This causes the level translator to be in output mode and it should only be in output mode when open in the Xilinx tools. Can you please verify that R5 is present on your board and measure the voltage of the OEGIO2 net at the location shown in the attached image? Thanks, Michael Link to comment Share on other sites More sharing options...
0 Daniel Carrasco Posted May 11, 2021 Author Share Posted May 11, 2021 Hi @malexander R5 seems to be mounted. I tried to meassure it (4,67Kohm). I measure voltage at marked point (left pin of R5). It is 3.339Volt when the card is just powered on. When I connect using Vivado, it drops to 0,085Volt Best regards Link to comment Share on other sites More sharing options...
0 malexander Posted May 11, 2021 Share Posted May 11, 2021 @Daniel Carrasco IC8 is an inverter powered at 2.3V so if you are measuring 3.3V at R5 (the input, pulled up) and 2.3V at output (R35, pull down to ground) then the inverter is not working correctly. Maybe IC8 was somehow damaged or there is a solder bridge underneath. How many modules do you have experiencing this behavior? Can you look at IC8 on the boards that work with a magnifying glass or microscope and see if it appears visibly different than the ones that don't? Thanks, Michael Link to comment Share on other sites More sharing options...
0 Daniel Carrasco Posted May 12, 2021 Author Share Posted May 12, 2021 Hi @malexander I do check that IC8 is damaged. I checked this on one of the two "bad" boards. The another board is not available now. It is impossible to see any damage at bare eye or even with magnifying glass. But using a microscope it is clear. I send atached one image. The chip is burned on its top-right corner. There is missing packaging and the ball grid can be seen. Then, this trouble seems to be a assemblying issue. I will contact with the mounting factory in order to clarify and watch the manufacturing procceses. Thank you, Best regards. Link to comment Share on other sites More sharing options...
Question
Daniel Carrasco
Good afternoon.
We have several JTAG_SMT2-NC modules on some identical cards.
We have observed an anormal behaviour on GPIO2 pin. This pin are connected to PS_SRST_B pin of a Xilinx Zynq FPGA.
In good cards, when the card are power on, GPIO2 signal goes to high (3,3V) level. So the Zynq is not reset.
In some "bad" cards, GPIO2 signal goes to low level when the card are powered on.
It could be a JTAG_SMT2-NC FW or version issue?
Could I check JTAG_SMT2-NC version via current USB connection?
If not, could I send you JTAG_SMT2-NC serial number or address in order to get FW version.
Best regards,
D. Carrasco
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