Pin assignment Problem - Bluetooth Pmod with Zedboard

[OddPants]

I'm trying to run the PMOD BT2 core on a Zedboard, using vivado 2020.2 ( i have not tried other version to be honest ), later i'd like to use this hardware to work with petalinux and write a driver for the bluetooth module. I've been trying for a week now but i can't figure it out, i've read some related posts but i don't know what to do, please help!

https://forum.digilentinc.com/topic/18026-pin-assignment-problem-sd-card-pmod/
https://forum.digilentinc.com/topic/79-pmodbt2-bluetooth-functionality-implementation

Here is the block design ( i have used the dilligent Digilent/vivado-library and Digilent/vivado-boards )

 

I have used the same approach with the OLED and it worked out fine. But with the BT2 it fails, I get these critical warnings as shown bellow.

 

 

The evil file is this.

 

 

[thinkthinkthink]

If you look in the wrapper file you should see these jd_pin*_io ports inside the entity. Now these are what you should add inside the contraints xdc file.

First go to our github here: Zedboard-Master_xdc and copy what's inside that file or download it and add it to your constraints.

Then look for the JD Pmod constraints that should start at line 124, uncomment them and replace what's inside the squiggly braces.

Finally, your JD contraints should look something like this:

Unfortunately I don't have a PmodBT2 on me to test this out but do let me know if it works or if you've encountered any problems.

Also, if you're going to work with petalinux make sure to connect the interrupt output of the PmodBT2 to the processing system as well.

[OddPants]

Thank you so much for your response, i did what u suggested but unfortunately the output is the same.

Also on top of that i get some errors from the constraints.

I don't know what i am doing wrong, i even tried with the hierarchical method ( https://github.com/Digilent/vivado-library/tree/hierarchies/hierarchies ; https://reference.digilentinc.com/learn/programmable-logic/tutorials/vivado-hierarchical-blocks/start ) but nothing seems to be working.

I also tried the 2019.1 version of vivado but still nothing.

 

Again, thank you so much @thinkthinkthink

Edit: I've managed to generate the bitstream but some critical errors ( i wasn't paying attention at the constraints )are still there, can i ignore them?

 

 

I can solve some of them by commenting some of the constraints

 

 

[thinkthinkthink]

Sorry I might have messed the order on those pins since jd_pin2_io should be on PACKAGE_PIN W7 and not jd_pin1_io. That's why you're getting all those critical errors.

But if you're working with board flow then you don't actually need to constrain any ports.

[OddPants]

Thank you, i have done this part with the board flow but if i delete the constraint file and do just the basic board configuration i end up with this errors ( in 2019.1 and 2020.2 )

This picture is for the project where i'm not using the constraint file.

 

On the other project by following your previous advice i get just some critical errors and i don't know if they can be ignored. ( the one with the constraint file added generates the bitstream )

 

Thank you so much and best regards.

 

 

 

[thinkthinkthink]

Sure, you can ignore those critical warnings since they'll just be overwritten by the board configuration files.

Those red errors you're getting shouldn't be there, I thought vivado 2020.2 should have fixed those wrapper file doesn't get updated after you've made some changes to the block design/constraints file bug, but you could get rid of them and make it work.

 Also, I hope you're not messing with the design_1_PmodBT2_0_0_board.xdc file as it should be read-only.

Please let me know if you've got it working properly, I feel like I'm doing a terrible job at explaining but I really want to help you.

[OddPants]

I made another project, used the default board that comes with vivado ( not the one from the diligent repo ) with manual constraint flow and i got rid of all errors and everything seems to be working just fine.

 

 

But with the board flow the picture posted above with 8 critical errors was the best i could get.

 

I can not thank you enough @thinkthinkthink, I've been struggling with this for quite a while.

Again thank you and i hope this is what i needed. You really helped me!

Best regards!