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About external trigger circuit and PMOD


Dear Sir,

I would like to use a external trigger circuit which it can trigger two boards. (PMOD as input)

When I program fpga bit to my board and measure its PMOD input.

The PMOD input is 3.3v. I am not sure it is correct or not.

How to set up the input as low ?

set_property PULLDOWN true [get_ports trigger_0] or PUDC_B 

external trigger circuit (Two boards's VCC and GND)




my xdc file (PYNQ z1)

## Pmod Header JA
set_property -dict {PACKAGE_PIN Y18 IOSTANDARD LVCMOS33} [get_ports trigger]


Best Regards


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HI @Paul Chang,

I'm not able to view the image you linked; could you try getting that uploaded again?

I'm also not entirely certain what you hoping to do with a trigger; it won't necessarily operate the same way a trigger does in a Test & Measurement product (oscilloscope, waveform generator, etc). Are you wanting to have some sort of process occur when a specific voltage is detected on the a Pmod pin? And yes, Pmod ports are effectively hard-wired to be at 3.3V LVCMOS logic.

If you are using pulldown resistors in your .xdc you'll also be wanting to use tristates so you can go to a high impedance state on the inout pins; this is normally handled automatically by most Xilinx IP, but will need to be written out manually if you are writing your own code. Could you also provide your top-level portmap?


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Hi @JColvin,

My two boards will wait this trigger input and both send the data at the same time.

external trigger circuit (Two boards's PMOD GND ,I think it does not need two board's vcc ,right?)


I think I can use the pmondbtn . It seems more better.


Can I use it to trigger two boards?

My top level file: (It is not xilinx IP)

module top1(
        input clk, //125Mhz
        input rst,
        input trigger, //external trigger
        output reg [3:0]led,
        output reg z //output signal

xdc file:

## Clock Signal
set_property -dict {PACKAGE_PIN H16 IOSTANDARD LVCMOS33} [get_ports clk]
create_clock -period 8.000 -name sys_clk_pin -waveform {0.000 4.000} -add [get_ports clk]

set_property -dict {PACKAGE_PIN D19 IOSTANDARD LVCMOS33} [get_ports rst]
## LEDs
set_property -dict {PACKAGE_PIN R14 IOSTANDARD LVCMOS33} [get_ports {led[0]}]
set_property -dict {PACKAGE_PIN P14 IOSTANDARD LVCMOS33} [get_ports {led[1]}]
set_property -dict {PACKAGE_PIN N16 IOSTANDARD LVCMOS33} [get_ports {led[2]}]
set_property -dict {PACKAGE_PIN M14 IOSTANDARD LVCMOS33} [get_ports {led[3]}]

## Pmod Header JA
set_property -dict {PACKAGE_PIN Y18 IOSTANDARD LVCMOS33} [get_ports trigger]

## Pmod Header JB
set_property -dict {PACKAGE_PIN W18 IOSTANDARD LVCMOS33} [get_ports z]


Best Regards,


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A simplistic approach to sending a signal to multiple boards is likely to produce issues.

You shouldn't connect the IO bank Vccio of two boards, each with a separate power supply directly together.

A better way to drive the same signal to multiple locations might be to use a buffer like the AHC244 and tie all of the inputs to your signal.

If your trigger source is a simple button then you will need to de-bounce the signal as the contacts will flop around when making contact and releasing contact.

Is there a reason why you can't create a suitable trigger on one board and feed it to both boards?

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9 hours ago, Paul Chang said:

Because I want both board can receive the trigger signal at the same time.

Can I ask what you envision as 'same time' ? Two boards with unrelated 100 MHz clocks have an indeterminate phase relationship. Indeed neither clock is  exactly 100 MHz so the phase relationship between them will never be constant. I mention this as something to think about.

You definitely need to have a common ground between the boards.

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