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How to set gpios on JTAG-SMT2-NC using vivado


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Hello,

I'm using a JTAG-SMT2-NC to programm an Xilinx Artix board - which is working fine.

But I could not find out, how the I can control the GPIO's using vivado (or other options?)?

Is there any documentation how to do this?

Thanks,

msc

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35 minutes ago, msc said:

I'm using a JTAG-SMT2-NC to programm an Xilinx Artix board

It would be nice if people didn't try hiding the fact that they aren't using a Digilent FPGA board but want help from anyone... even those not knowing important details. I believe that this is a pretty good assumption since almost all of the Digilent FPGA boards have both JTAG and UART endpoints.

 

35 minutes ago, msc said:

I could not find out, how the I can control the GPIO's using vivado (or other options?)?

You can use the BSCANE2 primitives through the JTAG interface but this is rather clunky. Vivado doesn't have a facility for controlling IO pins on specific hardware directly; every board is designed differently. Since you believe that you've been using the JTAG-SMT2 successfully you must have some idea that whatever bitstream is being used to configure your FPGA is doing something using IO. The best way to manipulate IO on a platform is to write a short HDL entity and assign the proper pin location constraints matching the port on that entity. It's hard to make other suggestions without knowing what interfaces your board has.

Perhaps you could add a bit more detail about what hardware you are using and what you want to do with the 'GPIO'.

Have you tried making use of the board vendor's documentation? That would seem to be a good place to start.

Edited by zygot
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Hi @msc,

In case you are referring to the GPIO pins on the JTAG SMT2, those can be controlled though Adept SDK (link to Adept and it's documentation here: https://reference.digilentinc.com/reference/software/adept/start). Those GPIO pins can enable multiple SPI devices to be connected, or in the case of GPIO2, allow for the Xilinx software to reset Zynq processor core during debug operations, provided GPIO2 is connected to the PS_SRST_B pin.

Thanks,
JColvin

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