Stability of clock frequency

[emfries]

Hello,

I'm working with the Artix-7 FPGA ARTY board, which has a physical on-board clock (my guess is some sort of crystal oscillator). Is there any documentation about this physical clock? In particular, I'm interested in changes in the clock's frequency as a function of temperature, and the stability of the clock's frequency over long periods of time.

Thanks,

[Pavel]

According to the Arty A7 schematics, the clock oscillator is ASEM1-100.000MHZ-LC-T. Here is a link to its datasheet. The overall frequency stability is ±50ppm. I think that the clock's frequency as a function of temperature can be measured relatively easily. For example, by counting the clock pulses between two PPS pulses and changing the temperature.

[zygot]

15 hours ago, emfries said:

'm interested in changes in the clock's frequency as a function of temperature, and the stability of the clock's frequency over long periods of time.

I heartily recommend that you take some time to visit the websites of a few clock module, clock crystal, etc. vendors and collect a few applications notes on the topic. A lot depends on the cut of the crystal and design of the module. It is an interesting subject and more complex than you'd think. Clocks are the heartbeat of all things programmable logic and often overlooked. Sometimes, it doesn't matter, but even then having a sense of how actual hardware can be different from an idealistic concept of timing is quite important.