Using an Arty Z7, I'm trying to migrate a real time motor control application from a microcontroller to the Arty Z7. My goal is to eventually implement the inner current control loop (running at 20kHz) in the PL fabric for high speed using Vivado HLS, while one of the two A9 cores runs the slower tasks (like velocity control), and the other A9 core runs the user interface.
With the real time determinism in mind, do I want to make my PL interface bus with an AXI4 "full" implementation, AXI4-Lite, or AXI4-Stream? From what I can see in the Xilinx App notes, AXI4-Stream is more for image processing, which is not what my intentions are.
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rt54321
Greetings All!
Using an Arty Z7, I'm trying to migrate a real time motor control application from a microcontroller to the Arty Z7. My goal is to eventually implement the inner current control loop (running at 20kHz) in the PL fabric for high speed using Vivado HLS, while one of the two A9 cores runs the slower tasks (like velocity control), and the other A9 core runs the user interface.
With the real time determinism in mind, do I want to make my PL interface bus with an AXI4 "full" implementation, AXI4-Lite, or AXI4-Stream? From what I can see in the Xilinx App notes, AXI4-Stream is more for image processing, which is not what my intentions are.
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