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Regarding MIPI v4.0 IP Core

iyer25

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iyer25

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I had a question on the mipi_csi2_rx_subsystem IP core. I am currently using mipi_csi2_rx_subsyst IP core v4.0 in the design. Which properties shall I use for the Block Properties settings to be Zedboard compatible using the Digilent PCAM FMC adapter. The by default design is set for ZCU102 board.

CONFIG.C_EXDES_BOARD ZCU102
CONFIG.C_EXDES_CONFIG MIPI_Video_Pipe_Camera_to_Display
CONFIG.C_EXDES_FMC LI-IMX274MIPI-FMC V1.0 Single Sensor

https://china.xilinx.com/support/documentation/pgi-pg .
 

 

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iyer25 Frequent Visitor

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1 hour ago, elodg said:

I believe those parameters are just for generating the example design, of which there is only one for that specific Xilinx TRD system.

Could you help me on this. In my design, its taking the configuration of the example design. I am confused because on the user manual it says this ip supports zynq 7000. So thats why I generated the licence . 

In the previous thread, I had asked on petalinux project for zedboard and fmc for pcam. 

I have generated the bit stream for camera A on the FMC card and petalinux project is okay too. In the pl.dtsi, I have a problem. I will attach the design  and pl.dtsi. 

Quote

/*
 * CAUTION: This file is automatically generated by Xilinx.
 * Version:  
 * Today is: Tue Feb 16 15:30:01 2021
 */


/ {
    amba_pl: amba_pl {
        #address-cells = <1>;
        #size-cells = <1>;
        compatible = "simple-bus";
        ranges ;
        axi_cama_bta: gpio@41210000 {
            #gpio-cells = <3>;
            clock-names = "s_axi_aclk";
            clocks = <&misc_clk_0>;
            compatible = "xlnx,axi-gpio-2.0", "xlnx,xps-gpio-1.00.a";
            gpio-controller ;
            reg = <0x41210000 0x10000>;
            xlnx,all-inputs = <0x0>;
            xlnx,all-inputs-2 = <0x0>;
            xlnx,all-outputs = <0x0>;
            xlnx,all-outputs-2 = <0x0>;
            xlnx,dout-default = <0x00000000>;
            xlnx,dout-default-2 = <0x00000000>;
            xlnx,gpio-width = <0x4>;
            xlnx,gpio2-width = <0x20>;
            xlnx,interrupt-present = <0x0>;
            xlnx,is-dual = <0x0>;
            xlnx,tri-default = <0xFFFFFFFF>;
            xlnx,tri-default-2 = <0xFFFFFFFF>;
        };
        misc_clk_0: misc_clk_0 {
            #clock-cells = <0>;
            clock-frequency = <100000000>;
            compatible = "fixed-clock";
        };
        axi_cama_gpio: gpio@41200000 {
            #gpio-cells = <3>;
            clock-names = "s_axi_aclk";
            clocks = <&misc_clk_0>;
            compatible = "xlnx,axi-gpio-2.0", "xlnx,xps-gpio-1.00.a";
            gpio-controller ;
            reg = <0x41200000 0x10000>;
            xlnx,all-inputs = <0x0>;
            xlnx,all-inputs-2 = <0x0>;
            xlnx,all-outputs = <0x0>;
            xlnx,all-outputs-2 = <0x0>;
            xlnx,dout-default = <0x00000000>;
            xlnx,dout-default-2 = <0x00000000>;
            xlnx,gpio-width = <0x4>;
            xlnx,gpio2-width = <0x20>;
            xlnx,interrupt-present = <0x0>;
            xlnx,is-dual = <0x0>;
            xlnx,tri-default = <0xFFFFFFFF>;
            xlnx,tri-default-2 = <0xFFFFFFFF>;
        };
        axi_vdma_0: dma@43000000 {
            #dma-cells = <1>;
            clock-names = "s_axi_lite_aclk", "m_axi_mm2s_aclk", "m_axis_mm2s_aclk", "m_axi_s2mm_aclk", "s_axis_s2mm_aclk";
            clocks = <&misc_clk_0>, <&misc_clk_0>, <&misc_clk_0>, <&misc_clk_0>, <&misc_clk_0>;
            compatible = "xlnx,axi-vdma-6.3", "xlnx,axi-vdma-1.00.a";
            interrupt-names = "mm2s_introut", "s2mm_introut";
            interrupt-parent = <&intc>;
            interrupts = <0 29 4 0 30 4>;
            reg = <0x43000000 0x10000>;
            xlnx,addrwidth = <0x20>;
            xlnx,flush-fsync = <0x1>;
            xlnx,num-fstores = <0x5>;
            dma-channel@43000000 {
                compatible = "xlnx,axi-vdma-mm2s-channel";
                interrupts = <0 29 4>;
                xlnx,datawidth = <0x18>;
                xlnx,device-id = <0x0>;
                xlnx,genlock-mode ;
            };
            dma-channel@43000030 {
                compatible = "xlnx,axi-vdma-s2mm-channel";
                interrupts = <0 30 4>;
                xlnx,datawidth = <0x18>;
                xlnx,device-id = <0x0>;
            };
        };
        mipi_csi2_rx_subsyst_0: mipi_csi2_rx_subsystem@43c10000 {
            clock-names = "lite_aclk", "dphy_clk_200M", "video_aclk";
            clocks = <&misc_clk_0>, <&misc_clk_1>, <&misc_clk_0>;
            compatible = "xlnx,mipi-csi2-rx-subsystem-4.0", "xlnx,mipi-csi2-rx-subsystem-4.0";
            interrupt-names = "csirxss_csi_irq";
            interrupt-parent = <&intc>;
            interrupts = <0 32 4>;
            reg = <0x43c10000 0x10000>;
            xlnx,axis-tdata-width = <32>;
            xlnx,cal-mode = "NONE";
            xlnx,clk-io-swap = "false";
            xlnx,clk-lane-io-position = <0x0>;
            xlnx,clk-lp-io-swap = "false";
            xlnx,csi-en-activelanes = "false";
            xlnx,csi-en-crc = "true";
            xlnx,csi-filter-userdatatype = "false";
            xlnx,csi-opt1-regs = "false";
            xlnx,csi-pxl-format = "RAW8";
            xlnx,csi2rx-dbg = <0x0>;
            xlnx,data-lane0-io-position = <0x2>;
            xlnx,data-lane1-io-position = <0x4>;
            xlnx,data-lane2-io-position = <0x6>;
            xlnx,data-lane3-io-position = <0x8>;
            xlnx,dl0-io-swap = "false";
            xlnx,dl0-lp-io-swap = "false";
            xlnx,dl1-io-swap = "false";
            xlnx,dl1-lp-io-swap = "false";
            xlnx,dl2-io-swap = "false";
            xlnx,dl2-lp-io-swap = "false";
            xlnx,dl3-io-swap = "false";
            xlnx,dl3-lp-io-swap = "false";
            xlnx,dphy-lanes = <0x2>;
            xlnx,dphy-mode = "SLAVE";
            xlnx,en-bg0-pin0 = "false";
            xlnx,en-bg0-pin6 = "false";
            xlnx,en-bg1-pin0 = "false";
            xlnx,en-bg1-pin6 = "false";
            xlnx,en-bg2-pin0 = "false";
            xlnx,en-bg2-pin6 = "false";
            xlnx,en-bg3-pin0 = "false";
            xlnx,en-bg3-pin6 = "false";
            xlnx,en-clk300m = "false";
            xlnx,en-csi-v2-0 = "false";
            xlnx,en-exdesigns = "false";
            xlnx,en-timeout-regs = "false";
            xlnx,en-vcx = "false";
            xlnx,esc-timeout = <0x6400>;
            xlnx,exdes-board = "ZCU102";
            xlnx,exdes-config = "MIPI_Video_Pipe_Camera_to_Display";
            xlnx,exdes-fmc = "LI-IMX274MIPI-FMC V1.0 Single Sensor";
            xlnx,fifo-rd-en-control = "true";
            xlnx,hs-line-rate = <0x3e8>;
            xlnx,hs-settle-ns = <0x91>;
            xlnx,hs-timeout = <0x10005>;
            xlnx,idly-group-name = "mipi_csi2rx_idly_group";
            xlnx,idly-tap = <0x1>;
            xlnx,init = <0x186a0>;
            xlnx,is-7series = "true";
            xlnx,is-versal = "false";
            xlnx,max-lanes = <2>;
            xlnx,mipi-slv-int = <0x0>;
            xlnx,ppc = <1>;
            xlnx,share-idlyctrl = "false";
            xlnx,stretch-line-rate = <0x5dc>;
            xlnx,vc = <4>;
            xlnx,vfb ;
        };
        misc_clk_1: misc_clk_1 {
            #clock-cells = <0>;
            clock-frequency = <200000000>;
            compatible = "fixed-clock";
        };
        v_demosaic_0: v_demosaic@43c40000 {
            clock-names = "ap_clk";
            clocks = <&misc_clk_0>;
            compatible = "xlnx,v-demosaic-1.0", "xlnx,v-demosaic";
            interrupt-names = "interrupt";
            interrupt-parent = <&intc>;
            interrupts = <0 33 4>;
            reg = <0x43c40000 0x10000>;
            xlnx,max-height = <2160>;
            xlnx,max-width = <3840>;
            xlnx,s-axi-ctrl-addr-width = <6>;
            xlnx,s-axi-ctrl-data-width = <32>;
            demosaic_ports: ports {
                #address-cells = <1>;
                #size-cells = <0>;
                demosaic_port1: port@1 {
                    /* For cfa-pattern=rggb user needs to fill as per BAYER format */
                    reg = <1>;
                    xlnx,cfa-pattern = "rggb";
                    xlnx,video-width = <8>;
                    demosaic_out: endpoint {
                        remote-endpoint = <&gamma_in>;
                    };
                };
            };
        };
        v_gamma_lut_0: v_gamma_lut@43c30000 {
            clock-names = "ap_clk";
            clocks = <&misc_clk_0>;
            compatible = "xlnx,v-gamma-lut-1.0", "xlnx,v-gamma-lut";
            interrupt-names = "interrupt";
            interrupt-parent = <&intc>;
            interrupts = <0 34 4>;
            reg = <0x43c30000 0x10000>;
            xlnx,max-height = <2160>;
            xlnx,max-width = <3840>;
            xlnx,s-axi-ctrl-addr-width = <13>;
            xlnx,s-axi-ctrl-data-width = <32>;
            gamma_ports: ports {
                #address-cells = <1>;
                #size-cells = <0>;
                gamma_port0: port@0 {
                    reg = <0>;
                    xlnx,video-width = <8>;
                    gamma_in: endpoint {
                        remote-endpoint = <&demosaic_out>;
                    };
                };
            };
        };
        v_tc_0: v_tc@43c00000 {
            clock-names = "clk", "s_axi_aclk";
            clocks = <&misc_clk_2>, <&misc_clk_0>;
            compatible = "xlnx,v-tc-6.1", "xlnx,v-tc-6.1";
            interrupt-names = "irq";
            interrupt-parent = <&intc>;
            interrupts = <0 31 4>;
            reg = <0x43c00000 0x10000>;
            xlnx,generator ;
        };
        misc_clk_2: misc_clk_2 {
            #clock-cells = <0>;
            clock-frequency = <742500000>;
            compatible = "fixed-clock";
        };
        video_dynclk: clk_wiz@43c20000 {
            #clock-cells = <1>;
            clock-names = "s_axi_aclk", "clk_in1";
            clock-output-names = "clk_out1", "clk_out2", "clk_out3", "clk_out4", "clk_out5", "clk_out6", "clk_out7";
            clocks = <&misc_clk_0>, <&clkc 15>;
            compatible = "xlnx,clk-wiz-6.0", "xlnx,clocking-wizard";
            reg = <0x43c20000 0x10000>;
            speed-grade = <1>;
        };
    };
};
 

. 
 https://github.com/meghuiyer/vga 

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