Arty Z7 - GPIO interrupts and edge sensitivity

[rt54321]

Greetings All!  I have an Arty Z7, and I'm following michael ee's online tutorial for GPIO interrupts here: 

https://www.youtube.com/watch?v=JPVTVNtJ7R4

Everything works - mostly!  I have a dummy counter in the interrupt handler.  When I press and release a button, the dummy counter increases by 2.  This tells me that the interrupt is firing on both positive and negative edges.  Is there an XGpio function, that tells the handler to trigger only on a certain edge (positive or negative, not both)?

[Niță Eduard]

Hello @rt54321,
According to the Xilinx's Zynq-7000 SoC Technical reference manual(https://www.xilinx.com/support/documentation/user_guides/ug585-Zynq-7000-TRM.pdf#G16.360722 ) you can program the trigger sensitivity using the INT_TYPE, INT_POLARITY and INT_ANY registers.
In the reference manual you may also find useful 14.3.4 Reading Data from GPIO Input Pins; Option 2: Use interrupt logic on input pins and Appendix B.19 General Purpose I/O Register Details (gpio)

Best wishes,
Eduard

[rt54321]

Thank you for your help Eduard!

I am still stuck on this issue, after using Xilinx's example code, as well as the

XScuGic_SetPriorityTriggerType(IntcInstancePtr, IntrId, 0xA0, 0x3);

function that is supposed to set interrupts on rising edge only. 

- Everything on my board is working (AXI Gpio 0 [my buttons] are inputs, AXI Gpio 1 are outputs, AXI Gpio 2 are outputs)

- The interrupts are firing based on axi gpio 0 (which is connected to my pushbuttons),

- My PWM block is outputting a PWM waveform that triggers the interrupt (I soldered a jumper wire from the PWM output [pin A0] to BTN0 on the board)

My interrupt handler toggles the pin outputs on AXI Gpio 2, so I can see when the interrupt is firing.  The result I get is the waveform attached (yellow trace is the PWM output, blue trace is IO26 on the board [controlled by axi gpio 2], which toggles every time the interrupt fires).

I just don't understand why the XScuGic_SetPriorityTriggerType function seems to have no affect.  Is there a way I can see the registers that contain the INT_TYPE, INT_POLARITY, and INT_ON_ANY bits in the debugger?

[Niță Eduard]

Hello @rt54321,
You can use the commands mrd and mwr  in the XSCT (Xilinx Software Command line Tool) to read/write values from/to registers.
You can find the documentation for these here: https://www.xilinx.com/support/documentation/sw_manuals/xilinx2019_1/ug1208-xsct-reference-guide.pdf
Although not related to the project, here is a tutorial which debugs a VDMA IP using XSCT commands on registers: https://forums.xilinx.com/t5/Design-and-Debug-Techniques-Blog/Video-Series-25-Debugging-issues-on-the-AXI-VDMA-IP/ba-p/941372

You could try clearing the interrupt pending register, which for this user fixed a very similar problem: http://zedboard.org/content/how-change-interrupt-trigger-type-risingfalling-edge-triggered

For a cleaner approach, you could use the XGpio_InterruptClear(XGpio * InstancePtr, u32 Mask) to clear the pending interrupts, like in this demo: https://github.com/Xilinx/embeddedsw/blob/master/XilinxProcessorIPLib/drivers/gpio/examples/xgpio_intr_tapp_example.c

Best wishes,
Eduard